saa569x NXP Semiconductors, saa569x Datasheet - Page 9

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saa569x

Manufacturer Part Number
saa569x
Description
Enhanced Tv Microcontrollers With On-screen Display Osd
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Note
1. A15_LN, A16_LN and A17_LN form a linear address space and may be used as an alternative to A15_BK (pin 33)
7
The functionality of the microcontroller used in this device
is described here with reference to the industry standard
80C51 microcontroller. A full description of its functionality
can be found in “Handbook IC20 80C51-Based 8-bit
Microcontrollers” .
7.1
2002 May 06
A15_BK
ROMBK0 to
ROMBK2
RAMBK0 to
RAMBK1
INTD
80C51 microcontroller core standard instruction set and
timing
0.5 s machine cycle
Maximum 192 kbytes
be extended to 256K with additional external ROM
Maximum of 14 kbytes
15-level interrupt controller with individual
enable/disable and two level priority
Up to six external interrupts with programmable
detection characteristics
Three 16-bit Timer/counter registers
Watchdog timer
Auxiliary RAM page pointer
16-bit Data pointer
Idle, Standby and Power-down modes
32 general I/O lines
Eight 6-bit Pulse Width Modulator (PWM) outputs for
control of TV analog signals
One 14-bit PWM for Voltage Synthesis Tuner (VST)
control
8-bit Analog-to-Digital Converter (ADC) with four
multiplexed inputs
Two high current outputs for directly driving LEDs etc.
I
Enhanced TV microcontrollers with
On-Screen Display (OSD)
2
C-bus byte level interface with dual ports
and ROMBK2 to ROMBK0 (pins 56, 57 and 58) for external program ROM access.
MICROCONTROLLER
SYMBOL
Microcontroller features
58 to 56
51, 50
PIN
8-bit Program ROM, which can
33
61
8-bit data and display RAM
TYPE
O
O
O
I
address line A15 when using ROMBK outputs for external program ROM
access
ROMBK SFR selection bits for external program ROM access >64 kbytes
RAMBK SFR selection bits for external program SRAM data storage
>64 kbytes; Use A0 to A14 and A15_BK as lower address bits
interrupt disable for emulation (internal pull-up)
9
8
The device has the capability of a maximum of 192 kbyte
Program ROM and 14 kbyte Data RAM internally.
8.1
The 128 kbyte Program ROM variant is arranged in four
banks of 32 kbytes. One of the 32 kbyte banks is common
and is always addressable. The other three banks
(Bank 0, 1 and 2) can be selected with SFR ROMBK
bits <2:0> (see Table 2 and Fig.3).
The 192 kbyte Program ROM variant is arranged in six
banks of 32 kbytes. One of the 32 kbyte banks is common
and is always addressable. The other five banks
(Bank 0, 1, 2, 3 and 4) can be selected with SFR ROMBK
bits <2:0> (see Table 2 and Fig.3). If this variant is used
with an additional external ROM, then a further two banks
(Bank 5 and 6) can be selected with SFR ROMBK
bits <2:0> (see Table 2 and Fig.3).
Table 2 ROM bank selection
ROMBK2 ROMBK1 ROMBK0
UART for asynchronous serial communication
External ROM and SRAM compatibility.
MEMORY ORGANISATION
0
0
0
0
1
1
1
1
ROM bank switching
DESCRIPTION
0
0
1
1
0
0
1
1
SAA567x; SAA569x
0
1
0
1
0
1
0
1
Objective specification
common
common
common
common
common
common
common
reserved
0 to 32
kbytes
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Bank 6
reserved
32 to 64
kbytes

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