w65c22 Western Design Center, Inc., w65c22 Datasheet - Page 33

• Manufacturer Part Number: w65c22
• Description: W65c22n And W65c22s Versatile Interface Adapter Via Datasheet
• Manufacturer: Western Design Center, Inc.

3.7
Peripheral Data Port B (PB0-PB7)
PB is an 8 line, bidirectional bus which is controlled by an ORA, IRB, and DDRB in a manner much the
same as PA. With respect to PB, the output signal on line PB7 may be controlled by Timer 1 while Timer 2
may be programmed to count pulses on the PB6 line. The W65C22S PB lines represent one CMOS high
impedance load with bus holding device in the input mode and will drive two TTL loads in the output mode.
PB lines are also capable of sourcing 3.0 mA at 1.5 V in the output mode. This allows the output to directly
drive Darlington transistor circuits.
Note that the W65C22S does not have current limiting resistors;
however, the W65C22N does have current limiting resistors. See Figures 3-9 through 3-12 for PB schematic
comparisons of W65C22N, W65C22S and legacy obsolete versions of the 6522.
Figure 3-9 W65C22S Port B Buffer (PB0-PB7, CB1, and CB2)
Figure 3-10 W65C22N and GTE - G65SC22 CMOS Port B Buffer (PB0-PB7, CB1, and CB2)
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