MC68HC908GT16_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908GT16_07 Datasheet - Page 134

• Manufacturer Part Number: MC68HC908GT16_07
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Input/Output (I/O) Ports (PORTS)
When bit DDRDx is a 1, reading address $0003 reads the PTDx data latch. When bit DDRDx is a 0,
reading address $0003 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
12.5.3 Port D Input Pullup Enable Register
The port D input pullup enable register (PTDPUE) contains a software configurable pullup device for each
of the eight port D pins. Each bit is individually configurable and requires that the data direction register,
DDRD, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRD is configured for output mode.
PTDPUE7–PTDPUE0 — Port D Input Pullup Enable Bits
12.6 Port E
Port E is a 5-bit special-function port that shares two of its pins with the serial communications interface
(SCI) module and two of its pins with the internal clock generator (ICG).
134
1. X = Don’t care
2. I/O pin pulled up to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High imp[edance
PTDPUE
These writable bits are software programmable to enable pullup devices on an input port bit.
Bit
X
1
0
1 = Corresponding port D pin configured to have internal pullup
0 = Corresponding port D pin has internal pullup disconnected
Address:
DDRD
Reset:
Read:
Write:
Bit
0
0
1
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Figure 12-16. Port D Input Pullup Enable Register (PTDPUE)
DD
PTDPUE7
$000F
Bit 7
by internal pullup device.
0
PTD
X
Bit
X
X
(1)
PTDPUE6
6
0
Input, Hi-Z
Input, V
Table 12-5. Port D Pin Functions
I/O Pin
Output
Mode
PTDPUE5
DD
(2)
(4)
5
0
Table 12-5
PTDPUE4
Accesses to DDRD
DDRD7–DDRD0
DDRD7–DDRD0
DDRD7–DDRD0
4
0
Read/Write
PTDPUE3
summarizes the operation of the port D pins.
3
0
PTDPUE2
2
0
PTD7–PTD0
Read
Pin
Pin
PTDPUE1
Accesses to PTD
1
0
Freescale Semiconductor
PTDPUE0
Bit 0
0
PTD7–PTD0
PTD7–PTD0
PTD7–PTD0
Write
(3)
(3)