MC68HC908GT16_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908GT16_07 Datasheet - Page 249

• Manufacturer Part Number: MC68HC908GT16_07
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

19.3.1.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
19.3.1.5 Break Signal
A start bit (0) followed by nine 0 bits is a break signal. When the monitor receives a break signal, it drives
the PTA0 pin high for the duration of two bits and then echoes back the break signal.
19.3.1.6 Baud Rate
The communication baud rate is controlled by the external clock or ICG upon entry into monitor mode.
Table 19-1
baud rate is the bus frequency divided by 256.
19.3.1.7 Commands
The monitor ROM firmware uses these commands:
The monitor ROM firmware echoes each received byte back to the PTA0 pin for error checking. An 11-bit
delay at the end of each command allows the host to send a break character to cancel the command. A
delay of two bit times occurs before each echo and before READ, IREAD, or READSP data is returned.
The data returned by a read command appears after the echo of the last byte of the command.
Freescale Semiconductor
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READ (read memory)
WRITE (write memory)
IREAD (indexed read)
IWRITE (indexed write)
READSP (read stack pointer)
RUN (run user program)
lists external frequencies required to achieve a standard baud rate of 9600 bps. The effective
Wait one bit time after each echo before sending the next byte.
START
BIT
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
0
BIT 0
1
2
MISSING STOP BIT
BIT 1
3
Figure 19-13. Monitor Data Format
Figure 19-14. Break Transaction
4
BIT 2
5
6
BIT 3
7
BIT 4
NOTE
BIT 5
2-STOP BIT DELAY BEFORE ZERO ECHO
BIT 6
0
1
BIT 7
2
3
STOP
BIT
4
START
NEXT
5
BIT
6
Monitor Module (MON)
7
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