MC68HC908GT16_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908GT16_07 Datasheet - Page 246

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MC68HC908GT16_07

Manufacturer Part Number
MC68HC908GT16_07
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Development Support
Table 19-1
must be entered after a power-on reset (POR) and will allow communication at 9600 baud provided one
of the following sets of conditions is met:
Once out of reset, the MCU waits for the host to send eight security bytes (see
security bytes, the MCU sends a break signal (10 consecutive 0s) to the host, indicating that it is ready to
receive a command.
246
1. If $FFFE and $FFFF does not contain $FF (programmed state):
2. If $FFFE and $FFFF contain $FF (erased state):
3. If $FFFE and $FFFF contain $FF (erased state):
2
3
5
1 μF
1 μF
DB9
+
+
The external clock is 4.9152 MHz with PTC3 low or 9.8304 MHz with PTC3 high
IRQ = V
The external clock is 9.8304 MHz
IRQ = V
IRQ = V
1
3
4
5
shows the pin conditions for entering monitor mode. As specified in the table, monitor mode
7
8
C1+
C1–
C2+
C2–
The PTA0 pin must remain high for 24 bus cycles after the RST pin goes
high to enter monitor mode properly.
MAX232
TST
DD
SS
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
(ICG is selected, no external clock required)
(this can be implemented through the internal IRQ pullup)
GND
V
V+
V–
CC
16
15
2
10
6
1 μF
9
V
DD
Figure 19-12. Standard Monitor Mode
+
0.1 μF
2
1 μF
74HC125
1
V
TST
+
3
74HC125
6
NOTE
4
10 kΩ
5
V
DD
9.8304 MHz CLOCK
0.1 μF
9.1 V
1 kΩ
N.C.
RST
OSC2
OSC1
IRQ
PTA0
19.3.2
Freescale Semiconductor
Security). After the
PTC0
PTC3
PTC1
V
V
V
DDA
V
SSA
DD
SS
10 kΩ
10 kΩ
2 kΩ
V
DD
0.1 μF
V
DD

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