MC68HC908GT16_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908GT16_07 Datasheet - Page 252

• Manufacturer Part Number: MC68HC908GT16_07
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Development Support
The MCU executes the SWI and PSHH instructions when it enters monitor mode. The RUN command
tells the MCU to execute the PULH and RTI instructions. Before sending the RUN command, the host can
modify the stacked CPU registers to prepare to run the host program. The READSP command returns
the incremented stack pointer value, SP + 1. The high and low bytes of the program counter are at
addresses SP + 5 and SP + 6.
19.3.2 Security
A security feature discourages unauthorized reading of Flash locations while in monitor mode. The host
can bypass the security feature at monitor mode entry by sending eight security bytes that match the
bytes at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-defined data.
During monitor mode entry, the MCU waits after the power-on reset for the host to send the eight security
bytes on pin PTA0. If the received bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all Flash locations and execute code from Flash. Security remains bypassed
until a power-on reset occurs. If the reset was not a power-on reset, security remains bypassed and
security code entry is not required. See
252
Data Returned
Do not leave locations $FFF6–$FFFD blank. For security reasons, program
locations $FFF6–$FFFD even if they are not used for vectors.
Description
Operand
Opcode
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Figure 19-17. Stack Pointer at Monitor Mode Entry
Table 19-7. RUN (Run User Program) Command
Executes PULH and RTI instructions
None
None
$28
HIGH BYTE OF PROGRAM COUNTER
LOW BYTE OF PROGRAM COUNTER
HIGH BYTE OF INDEX REGISTER
LOW BYTE OF INDEX REGISTER
CONDITION CODE REGISTER
Figure
ECHO
FROM HOST
Command Sequence
RUN
ACCUMULATOR
19-18.
NOTE
RUN
SP
SP + 1
SP + 2
SP + 3
SP + 4
SP + 5
SP + 6
SP + 7
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