MC68HC908GT16_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908GT16_07 Datasheet - Page 60

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MC68HC908GT16_07

Manufacturer Part Number
MC68HC908GT16_07
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Configuration Register (CONFIG)
LVIPWRD — LVI Power Disable Bit
LVI5OR3 — LVI 5-V or 3-V Operating Mode Bit
SSREC — Short Stop Recovery Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
60
LVIPWRD disables the LVI module. See
LVI5OR3 selects the voltage operating mode of the LVI module. See
(LVI)
Electrical Specifications
SSREC enables the CPU to exit stop mode with a delay of 32 CGMXCLK cycles instead of a
4096-CGMXCLK cycle delay.
The short stop recovery delay can be enabled when using the internal oscillator, a crystal, or a ceramic
resonator and the OSCENINSTOP bit is set. The short stop recovery delay can be enabled when an
external oscillator is used, regardless of the OSCENINSTOP setting.
The short stop recovery delay must be disabled (SSREC = 0) when the OSCENINSTOP bit is cleared.
STOP enables the STOP instruction.
COPD disables the COP module. See
1 = LVI module power disabled
0 = LVI module power enabled
1 = LVI operates in 5-V mode.
0 = LVI operates in 3-V mode.
1 = Stop mode recovery after 32 CGMXCLK cycles
0 = Stop mode recovery after 4096 CGMXCLCK cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
The voltage mode selected for the LVI should match the operating V
The LVI5OR3 bit is cleared by a power-on reset (POR) only. Other resets
will leave this bit unaffected.
Exiting stop mode by an LVI reset will result in the long stop recovery.
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
for the LVI’s voltage trip points for each of the modes.
Chapter 5 Computer Operating Properly (COP)
Chapter 10 Low-Voltage Inhibit
NOTE
NOTE
Chapter 10 Low-Voltage Inhibit
(LVI).
DD
. See
Freescale Semiconductor
Chapter 20
Module.

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