PEF2091 Siemens Semiconductor Group, PEF2091 Datasheet - Page 12

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PEF2091

Manufacturer Part Number
PEF2091
Description
ICs for Communications(ISDN Echocancellation Circuit)
Manufacturer
Siemens Semiconductor Group
Datasheet

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0
List of Figures
Figure 83
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Semiconductor Group
Serial Data Port of Pin PS2 in LT Modes . . . . . . . . . . . . . . . . . . . . . . .195
Sampling of Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .198
State Machine Notation for S/G Bit Control . . . . . . . . . . . . . . . . . . . . .200
State Machine for S/G Bit Control (part 1) . . . . . . . . . . . . . . . . . . . . . .201
State Machine for S/G Bit Control (part 2) . . . . . . . . . . . . . . . . . . . . . .202
State Machine for S/G Bit Control (Part 3) . . . . . . . . . . . . . . . . . . . . . .203
Example: C/I-Channel Use (all data values hexadecimal) . . . . . . . . . .232
Power Supply Blocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .249
U-Interface Hybrid Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250
Crystal Oscillator or External Clock Source . . . . . . . . . . . . . . . . . . . . .252
D-Channel Request by the Terminal . . . . . . . . . . . . . . . . . . . . . . . . . .256
EOC-Handling in Repeater Applications . . . . . . . . . . . . . . . . . . . . . . .257
Maintenance Bit Handling in Repeaters (Example) . . . . . . . . . . . . . . .258
Total Power Measurement Set-Up. . . . . . . . . . . . . . . . . . . . . . . . . . . .260
Maximum Sinusoidal Ripple on Supply Voltage
Test Condition for Maximum Input Current . . . . . . . . . . . . . . . . . . . . .264
U transceiver Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .264
Pulse Mask for a Single Positive Pulse . . . . . . . . . . . . . . . . . . . . . . . .267
Input/Output Wave form for AC Tests . . . . . . . . . . . . . . . . . . . . . . . . .269
Siemens/Intel Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .270
Siemens/Intel Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .270
Siemens/Intel Multiplexed Address Timing . . . . . . . . . . . . . . . . . . . . .270
Siemens/Intel Non-Multiplexed Address Timing . . . . . . . . . . . . . . . . .271
Motorola Read Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .271
Motorola Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .271
Motorola Non-Multiplexed Address Timing . . . . . . . . . . . . . . . . . . . . .272
Serial µP Interface Mode Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .273
Serial µP Interface Mode Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .273
IOM
IOM
Dynamic Characteristics of Power Controller Write Access. . . . . . . . .277
Dynamic Characteristics of Power Controller Read Access . . . . . . . .278
Dynamic Characteristics of Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . .279
UVD Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .280
Clock Requirements in LT Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . .281
Dynamic Characteristics of the Duty Cycle . . . . . . . . . . . . . . . . . . . . .282
Maximum Sinusoidal Input Jitter of Master Clock 15.36 MHz . . . . . . .282
Clock Requirements in NT-PBX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .284
Dynamic Characteristics of CLS . . . . . . . . . . . . . . . . . . . . . . . . . . . . .284
Dynamic Characteristics of Pin SG . . . . . . . . . . . . . . . . . . . . . . . . . . .286
Package Outline for P-LCC-44 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .287
S/G Bit Status on Pin S/G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .205
®
®
-2 Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .274
-2 Timing of IOM
®
-2 Interface (Detail) . . . . . . . . . . . . . . . . . . . .275
12
. . . . . . . . . . . . . . . .263
Data Sheet 01.99
PEB 2091
PEF 2091
Page

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