PEF2091 Siemens Semiconductor Group, PEF2091 Datasheet - Page 80

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PEF2091

Manufacturer Part Number
PEF2091
Description
ICs for Communications(ISDN Echocancellation Circuit)
Manufacturer
Siemens Semiconductor Group
Datasheet

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3.6.3.2
Monitor Channel 1 is only available in TE mode (DCL = 1.536 MHz).
In stand-alone mode the Monitor 1 channel is ignored by the IEC-Q.
In µP mode it can be accessed via the microprocessor interface to control an external
device (e.g. SICOFI
interface access to the Monitor Channel see "Monitor Channel Access", page 101.
3.6.3.3
Note 17: This feature is only available for the active Monitor Channel, see "Active
The IEC-Q can operate with or without the "Monitor Procedure Time-out" feature. For
mode setting see "Monitor Procedure Time-Out (MTO)", page 55.
With the MTO-function enabled, the monitor routine is reset twice per U-superframe (see
"U -Frame Structure", page 67 for definition). The resets are performed at the start of the
first and 49th IOM
DOUT to the idle state (MR and MX set to high) thereby preventing lock-up situations.
Monitor Channel transmitter and receiver are reset synchronously.
With the MTO-function disabled no internal resets are performed. This eliminates the
restrictions described in the following paragraphs, requires however an external
controller to prevent lock-up situations in the Monitor Channel.
postpone the answer until after the internal reset, see "Monitor Procedure Time-Out
(MTO)", page 55. Figure 28, page 78 illustrates the case where the response can be
sent immediately.
The procedure for the response is similar to that described in points 1 – 6 except for
the transmission direction. It is assumed that the controller does not latch monitor
data. For this reason one additional frame will be required for acknowledgment.
Transmission of the 2nd monitor byte will be started by the IEC-Q in the frame
immediately following the acknowledgment of the first byte. The IEC-Q does not delay
the monitor transfer.
Monitor Channel", page 76.
Monitor Channel 1
Monitor Procedure Time-Out
®
-2-frame (see Figure 30). Every reset sets both handshake bits of
®
, ARCOFI
®
). For a detailed description of the microprocessor
80
Functional Description
Data Sheet 01.99
PEB 2091
PEF 2091

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