PEF2091 Siemens Semiconductor Group, PEF2091 Datasheet - Page 90
PEF2091
Manufacturer Part Number
PEF2091
Description
ICs for Communications(ISDN Echocancellation Circuit)
Manufacturer
Siemens Semiconductor Group
Datasheet
1.PEF2091.pdf
(298 pages)
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3.8
Note 21: This Interface is only available in the microprocessor mode.
The parallel/serial microprocessor interface can be selected to be either of the
1. Siemens/Intel non-multiplexed bus type with control signals CS, WR, RD
2. Motorola type with control signals CS, R/W, DS
3. Siemens/Intel multiplexed address/data bus type with control
4. Serial mode using control signals CDIN, CDOUT, CCLK and CS.
The selection is performed via pins ALE/CCLK and SMODE as follows:
Table 12
Siemens/Intel non-Mux
Motorola
Siemens/Intel Mux
Serial
The occurrence of an edge on ALE/CCLK, either positive or negative, at any time during
the operation immediately selects interface type 3 or 4. A return to one of the other
interface types is possible only if a hardware reset is issued.
The timing of the different microprocessor bus types is given in sections 8.7.1, page 269
for the parallel bus type and in section 8.7.2, page 273, for the serial bus type.
3.9
Note 22: This chapter applies only in the µP-TE mode (see "Basic Operating
If DCL = 1.536 MHz the IOM
"Terminal Timing Mode", page 73). The last octet of an IOM
and the BAC bit. Either or both bits can be used in various applications including
• the D-channel arbitration in a PBX via an ELIC
• the synchronization of a base station in wireless local loop applications
The S/G bit is always written and never read by the IEC-Q. Its value depends on the last
received EOC-command and on the status of the BAC bit. The processing mode for the
S/G bit is selected via bits SWST:BS, SWST:SGL and ADF:CBAC (see "ADF-Register",
page 219). A detailed operational description of the S/G bit control in all modes is
provided in "S/G Bit and BAC Bit Operations", page 198.
signals CS, WR, RD, ALE
Mode", page 50).
Microprocessor Interface
S/G Bit and BAC bit Control
Microprocessor Interface Modes
ALE
0
1
edge
edge
®
-2 interface consists of three IOM
SMODE
x
x
0
1
90
®
on the line card
®
-2 frame includes the S/G
Functional Description
®
-2 channels (see
Data Sheet 01.99
PEB 2091
PEF 2091
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