PEF2091 Siemens Semiconductor Group, PEF2091 Datasheet - Page 274

• Manufacturer Part Number: PEF2091
• Description: ICs for Communications(ISDN Echocancellation Circuit)
• Manufacturer: Siemens Semiconductor Group

Semiconductor Group
Table 50
C
8.7.3
Note 79: In case the period of signals is stated the time reference will be at 1.4 V;
Via the IOM
data clock rate. The data clock (DCL) is a square wave signal with a duty cycle ratio of
typically 1:1. Incoming data is sampled on the falling edge of the DCL-clock.
Figure 113
The dynamic characteristics of the IOM
where Detail "a" of Figure 113 is shown in more detail.
Parameter
Clock period
Chip Select setup time
Chip Select hold time
CDIN setup time
CDIN hold time
CDOUT data out delay
Load
= 50pF
in all other cases 0.8 V (low) and 2.0 V (high) thresholds are used as
reference.
DCL
FSC
DU
DD
IOM
®
-2-interface data is transmitted in both directions (DU and DD) at half the
Timing Characteristics (serial µP interface mode)
IOM
®
-2 Interface Timing
®
-2 Interface Timing
Bit 32
Bit 0
®
-2-interface is given in the following Figure 114
274
"a"
Bit 1
Symbol
t
t
t
t
t
t
P
CSs
CSh
CDINs
CDINh
CDOUTd
Electrical Characteristics
Bit 2
min.
130
0
20
40
40
ITD04228
Data Sheet 01.99
max. unit
30
PEB 2091
PEF 2091
ns
ns
ns
ns
ns
ns