PEF2091 Siemens Semiconductor Group, PEF2091 Datasheet - Page 281

• Manufacturer Part Number: PEF2091
• Description: ICs for Communications(ISDN Echocancellation Circuit)
• Manufacturer: Siemens Semiconductor Group

8.7.6
8.7.6.1
In LT modes (except COT-512/1536 mode) all timing signals are derived from a system
clock via an external phase locked loop. The clock specifications for these modes are
described below.
For the LT modes COT-512 and COT-1536 the requirements as specified in section “NT
Modes” on page 283 (NT modes) apply.
Figure 119
Note 82: FSC*Fictitious FSC indicates ideal FSC-clock (existing master clock divided
Master Clock
– Nominal Frequency15.36 MHz
– Jitter (peak-to-peak) see Figure 121, page 282
– Max. phase deviation between FSC and fictitious FSC* 18 s
– Duty ratio see Figure 120, page 282
Semiconductor Group
by 1920 without delay).
FSCReal FSC (contains phase shift resulting from propagation delays in
divider).
Master Clock
LT Modes
IEC-Q
Clock Requirements in LT Modes
IOM
R
%
-Frame
Frame Adapt
XIN
15.36 - MHz Master Clock
281
IOM
R
%
-Frame
DCL
FSC
FSC*
Electrical Characteristics
System Clock
Generation
Clock
Data Sheet 01.99
ITD04262
IOM
PEB 2091
PEF 2091
R