S9S12GN16F0VLF Freescale Semiconductor, S9S12GN16F0VLF Datasheet - Page 707

Manufacturer Part Number

S9S12GN16F0VLF

16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM

Manufacturer

Freescale Semiconductor

Processor Series

Data Bus Width

Maximum Clock Frequency

Program Memory Size

Data Ram Size

Operating Supply Voltage

3.13 V to 5.5 V

Operating Temperature Range

- 40 C to + 85 C

Package / Case

Mounting Style

This section consists of register descriptions in address order. Each description includes a standard register

diagram with an associated ﬁgure number. Details of register bit and ﬁeld function follow the register

diagrams, in bit order.

Read: Anytime

Write: Anytime

Freescale Semiconductor

Module Base +0x0000

SPI Interrupt Enable Bit — This bit enables SPI interrupt requests, if SPIF or MODF status ﬂag is set.

0 SPI interrupts disabled.

1 SPI interrupts enabled.

SPI System Enable Bit — This bit enables the SPI system and dedicates the SPI port pins to SPI system

functions. If SPE is cleared, SPI is disabled and forced into idle state, status bits in SPISR register are reset.

0 SPI disabled (lower power consumption).

1 SPI enabled, port pins are dedicated to SPI functions.

SPI Transmit Interrupt Enable — This bit enables SPI interrupt requests, if SPTEF ﬂag is set.

0 SPTEF interrupt disabled.

1 SPTEF interrupt enabled.

SPI Control Register 1 (SPICR1)

= Unimplemented or Reserved

Figure 21-3. SPI Control Register 1 (SPICR1)

MC9S12G Family Reference Manual, Rev.1.23

Table 21-1. SPICR1 Field Descriptions

Figure 21-2. SPI Register Summary

Serial Peripheral Interface (S12SPIV5)