S9S12GN16F0VLF Freescale Semiconductor, S9S12GN16F0VLF Datasheet - Page 726

• Manufacturer Part Number: S9S12GN16F0VLF
• Description: 16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
• Manufacturer: Freescale Semiconductor

Specifications of S9S12GN16F0VLF

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 1024 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TSSOP-20
• Mounting Style: SMD/SMT

Serial Peripheral Interface (S12SPIV5)
The direction of each serial I/O pin depends on the BIDIROE bit. If the pin is configured as an output,
serial data from the shift register is driven out on the pin. The same pin is also the serial input to the shift
register.
21.4.6
The SPI has one error condition:
21.4.6.1
If the SS input becomes low while the SPI is configured as a master, it indicates a system error where more
than one master may be trying to drive the MOSI and SCK lines simultaneously. This condition is not
permitted in normal operation, the MODF bit in the SPI status register is set automatically, provided the
MODFEN bit is set.
In the special case where the SPI is in master mode and MODFEN bit is cleared, the SS pin is not used by
the SPI. In this special case, the mode fault error function is inhibited and MODF remains cleared. In case
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Bidirectional Mode
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When SPE = 1
Normal Mode
SPC0 = 0
SPC0 = 1
The SCK is output for the master mode and input for the slave mode.
The SS is the input or output for the master mode, and it is always the input for the slave mode.
The bidirectional mode does not affect SCK and SS functions.
Mode fault error
Error Conditions
Mode Fault Error
In bidirectional master mode, with mode fault enabled, both data pins MISO
and MOSI can be occupied by the SPI, though MOSI is normally used for
transmissions in bidirectional mode and MISO is not used by the SPI. If a
mode fault occurs, the SPI is automatically switched to slave mode. In this
case MISO becomes occupied by the SPI and MOSI is not used. This must
be considered, if the MISO pin is used for another purpose.
Serial Out
Serial In
Serial Out
SPI
Serial In
Table 21-10. Normal Mode and Bidirectional Mode
SPI
Master Mode MSTR = 1
MC9S12G Family Reference Manual,
BIDIROE
NOTE
MOMI
MOSI
MISO
Rev.1.23
Serial Out
Serial In
Serial Out
SPI
Serial In
SPI
Slave Mode MSTR = 0
BIDIROE
Freescale Semiconductor
SISO
MOSI
MISO