S9S12G64F1MLC Freescale Semiconductor, S9S12G64F1MLC Datasheet - Page 271

• Manufacturer Part Number: S9S12G64F1MLC
• Description: 16-bit Microcontrollers - MCU S12CORE,64K FLASH,AU
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G64F1MLC

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-32
• Mounting Style: SMD/SMT

5.3.2.4
Read: Anytime
Write: Anytime
The four index bits of the PPAGE register select a 16K page in the global memory map
selected 16K page is mapped into the paging window ranging from local address 0x8000 to 0xBFFF.
Figure 5-9
CPU has special access to read and write this register directly during execution of CALL and RTC
instructions.
The fixed 16KB page from 0x0000 to 0x3FFF is the page number 0xC. Parts of this page are covered by
Registers, EEPROM and RAM space. See SoC Guide for details.
The fixed 16KB page from 0x4000–0x7FFF is the page number 0xD.
Freescale Semiconductor
Address: 0x0015
PIX[3:0]
Reset
Field
3–0
W
R
illustrates the translation from local to global addresses for accesses to the paging window. The
Program Page Index Bits 3–0 — These page index bits are used to select which of the 256 flash array pages
is to be accessed in the Program Page Window.
Program Page Index Register (PPAGE)
0
0
7
Writes to this register using the special access of the CALL and RTC
instructions will be complete before the end of the instruction execution.
Bit17
0
0
6
PPAGE Register [3:0]
Figure 5-8. Program Page Index Register (PPAGE)
MC9S12G Family Reference Manual, Rev.1.23
Figure 5-9. PPAGE Address Mapping
Table 5-7. PPAGE Field Descriptions
0
0
5
Global Address [17:0]
Bit14
NOTE
0
0
4
Bit13
Description
Address: CPU Local Address
PIX3
1
3
Address [13:0]
or BDM Local Address
S12G Memory Map Controller (S12GMMCV1)
PIX2
1
2
Bit0
PIX1
(Figure
1
1
5-11). The
PIX0
0
0
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