S9S12G64F1MLC Freescale Semiconductor, S9S12G64F1MLC Datasheet - Page 392

• Manufacturer Part Number: S9S12G64F1MLC
• Description: 16-bit Microcontrollers - MCU S12CORE,64K FLASH,AU
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G64F1MLC

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-32
• Mounting Style: SMD/SMT

S12 Clock, Reset and Power Management Unit (S12CPMU)
10.3.2.16 Autonomous Periodical Interrupt Rate High and Low Register
The CPMUAPIRH and CPMUAPIRL registers allow the configuration of the autonomous periodical
interrupt rate
Read: Anytime
Write: Anytime if APIFE=0. Else writes have no effect.
The period can be calculated as follows depending on logical value of the APICLK bit:
394
0x02F4
0x02F5
APIR[15:0]
Reset
Reset
Field
15-0
W
W
R
R
APICLK=0: Period = 2*(APIR[15:0] + 1) * f
APICLK=1: Period = 2*(APIR[15:0] + 1) * Bus Clock period
APIR15
APIR7
Figure 10-20. Autonomous Periodical Interrupt Rate High Register (CPMUAPIRH)
.
Autonomous Periodical Interrupt Rate Bits — These bits define the time-out period of the API. See
Table 10-20
Figure 10-21. Autonomous Periodical Interrupt Rate Low Register (CPMUAPIRL)
(CPMUAPIRH / CPMUAPIRL)
0
0
7
7
For APICLK bit clear the first time-out period of the API will show a latency
time between two to three f
release when the API feature gets enabled (APIFE bit set)
= Unimplemented or Reserved
APIR14
for details of the effect of the autonomous periodical interrupt rate bits.
Table 10-19. CPMUAPIRH / CPMUAPIRL Field Descriptions
APIR6
0
0
6
6
MC9S12G Family Reference Manual,
APIR13
APIR5
0
0
5
5
ACLK
APIR12
APIR4
cycles due to synchronous clock gate
NOTE
0
0
4
4
ACLK
Description
APIR11
APIR3
0
0
3
3
Rev.1.23
APIR10
APIR2
.
0
0
2
2
Freescale Semiconductor
APIR9
APIR1
0
0
1
1
APIR8
APIR0
0
0
0
0