S9S12G64F1MLC Freescale Semiconductor, S9S12G64F1MLC Datasheet - Page 648

• Manufacturer Part Number: S9S12G64F1MLC
• Description: 16-bit Microcontrollers - MCU S12CORE,64K FLASH,AU
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G64F1MLC

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 4 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-32
• Mounting Style: SMD/SMT

Pulse-Width Modulator (S12PWM8B8CV2)
The clock source of each PWM channel is determined by PCLKx bits in PWMCLK (see
“PWM Clock Select Register
and
19.3.2.8
PWMSCLA is the programmable scale value used in scaling clock A to generate clock SA. Clock SA is
generated by taking clock A, dividing it by the value in the PWMSCLA register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLA).
Read: Anytime
Write: Anytime (causes the scale counter to load the PWMSCLA value)
19.3.2.9
PWMSCLB is the programmable scale value used in scaling clock B to generate clock SB. Clock SB is
generated by taking clock B, dividing it by the value in the PWMSCLB register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLB).
Read: Anytime
Write: Anytime (causes the scale counter to load the PWMSCLB value).
650
Module Base + 0x0008
Module Base + 0x0009
Reset
Reset
Table
W
W
R
R
Clock SA = Clock A / (2 * PWMSCLA)
Clock SB = Clock B / (2 * PWMSCLB)
19-6.
Bit 7
Bit 7
PWM Scale A Register (PWMSCLA)
PWM Scale B Register (PWMSCLB)
0
0
7
7
When PWMSCLA = $00, PWMSCLA value is considered a full scale value
of 256. Clock A is thus divided by 512.
When PWMSCLB = $00, PWMSCLB value is considered a full scale value
of 256. Clock B is thus divided by 512.
0
0
6
6
6
6
Figure 19-10. PWM Scale A Register (PWMSCLA)
Figure 19-11. PWM Scale B Register (PWMSCLB)
(PWMCLK)) and PCLKABx bits in PWMCLKAB as shown in
MC9S12G Family Reference Manual,
0
0
5
5
5
5
NOTE
NOTE
0
0
4
4
4
4
0
0
3
3
3
3
Rev.1.23
0
0
2
2
2
2
Freescale Semiconductor
0
0
1
1
1
1
Section 19.3.2.3,
Table 19-5
Bit 0
Bit 0
0
0
0
0