5AGXBA1D4F31C4N Altera Corporation, 5AGXBA1D4F31C4N Datasheet - Page 31

• Manufacturer Part Number: 5AGXBA1D4F31C4N
• Description: FPGA - Field Programmable Gate Array FPGA - Arria V GX 2830 LABS 416 IOs
• Manufacturer: Altera Corporation
• Series: Arria V GXr

Specifications of 5AGXBA1D4F31C4N

• Rohs: yes
• Number Of Logic Blocks: 2830
• Number Of I/os: 416
• Maximum Operating Frequency: 800 MHz
• Operating Supply Voltage: 1.2 V to 1.8 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-896
• Distributed Ram: 8463 kbit
• Minimum Operating Temperature: 0 C

AV-51001
2013.01.11
Arria V Device Overview
Enhanced Configuration and Configuration via Protocol
Power Management
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29
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Table 23: Configuration Modes and Features of Arria V Devices
Arria V devices support 1.8 V, 2.5 V, 3.0 V, and 3.3 V
AS through the EPCS
and EPCQ serial
configuration device
PS through CPLD or
external
microcontroller
FPP
CvP (PCIe)
JTAG
Configuration via
HPS
Arria V GZ does not support 3.3 V.
Supported at a clock rate of 50-62.5 MHz.
Arria V GZ only
Instead of using an external flash or ROM, you can configure the Arria V devices through PCIe using CvP.
The CvP mode offers the fastest configuration rate and flexibility with the easy-to-use PCIe hard IP block
interface. The Arria V CvP implementation conforms to the PCIe 100 ms power-up-to-active time
requirement.
Note:
For more information about CvP, refer to the
FPGAs User
Leveraging the FPGA architectural features, process technology advancements, and transceivers that are
designed for power efficiency, the Arria V devices consume less power than previous generation Arria FPGAs:
Total device core power consumption—less by up to 50%.
Transceiver channel power consumption—less by up to 50%.
Mode
For PCIe Gen3, which is supported in Arria V GZ devices, CvP supports update mode only.
Guide.
x1, x2, x4,
32 bits
1 bit, 4
16 bits
and x8
32 bits
16 bits
Width
8 bits
lanes
Data
1 bit
1 bit
bits
30
Max Clock
(MHz)
Rate
100
125
125
125
100
125
100
33
—
Max Data
(Mbps)
Rate
125
—
—
—
—
—
33
—
—
Configuration via Protocol (CvP) Implementation in Altera
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programming voltages and several configuration modes.
Decompression
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
Design Se-
curity
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
—
Arria V Device Overview
Reconfiguration
Partial
Yes
Yes
Yes
—
—
—
—
—
—
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Altera Corporation
Parallel flash
Parallel flash
Remote
System
Update
loader
loader
Yes
—
—
—
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