ISL6565ACBZ Intersil, ISL6565ACBZ Datasheet - Page 12

• Manufacturer Part Number: ISL6565ACBZ
• Description: IC CTRLR PWM MULTIPHASE 28-SOIC
• Manufacturer: Intersil

Specifications of ISL6565ACBZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1.5MHz
• Duty Cycle: 66.7%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Frequency-max: 1.5MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INDUCTOR DCR SENSING (ISL6565B ONLY)
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 5. The channel current
I
Equation 5 shows the s-domain equivalent voltage, V
across the inductor.
A simple R-C network across the inductor (R
extracts the DCR voltage, as shown in Figure 5. The voltage
across the sense capacitor, V
proportional to the channel current I
In some cases it may be necessary to use a resistor divider
R-C network to sense the current through the inductor. This
can be accomplished by placing a second resistor, R
across the sense capacitor. In these cases the voltage
across the sense capacitor, V
channel current I
K
L
V
V
V
SAMPLE
, flowing through the inductor, passes through the DCR.
L
C
C
ISL6565A INTERNAL CIRCUIT
HOLD
FIGURE 4. ISL6565A INTERNAL AND EXTERNAL CURRENT-
=
s ( )
s ( )
s ( )
I
&
-------------------- -
R
n
2
=
=
=
R
+
I
I
2
SEN
------------------------------------- - DCR I
(
------------------------------------------------------- - K DCR I



L
R
s R
s


⋅
1
⋅
-------------
DCR
⋅
(
s L
s L
(
----------------------- - C
R
SENSING CIRCUITRY
R
=
⋅


1
⋅
-------------
DCR
1
1
s L
⋅
I
L
+
C
L
⋅
⋅
+
+
R
, and the resistor divider ratio, K.
r
------------------------- -
R
+
DCR
1
+
DS ON
R
-
2
2


+
ISEN
1
)
(
⋅
)
1


⋅
)
+
)
1



12
⋅
⋅
C
C
ISEN(n)
EXTERNAL CIRCUIT
L
, becomes proportional to the
, can be shown to be
⋅
CHANNEL N
LOWER MOSFET
L
R
, shown in Equation 6.
ISEN
⋅
L
V
IN
1
+
CHANNEL N
UPPER MOSFET
-
and C)
I
L
r
DS ON
ISL6565A, ISL6565B
I
L
(EQ. 5)
(EQ. 6)
(EQ. 7)
(EQ. 8)
(
2
L
,
,
)
If the R-C network components are selected such that the
RC time constant matches the inductor L/DCR time
constant, then V
DCR multiplied by the ratio of the resistor divider, K. If a
resistor divider is not being used, the value for K is 1.
The capacitor voltage V
sense resistor R
R
ICOMMON pin. The current through R
the inductor current. Equation 9 shows that the proportion
between the channel current and the sensed current (I
is driven by the value of the sense resistor chosen, the
resistor divider ratio, and the DCR of the inductor.
Channel-Current Balance
The sampled currents, I
summed together and divided by the number of active
channels. The resulting cycle average current, I
provides a measure of the total load-current demand on the
converter during each switching cycle. Channel-current
balance is achieved by comparing the sampled current of
each channel to the cycle average current, and making the
proper adjustment to each channel pulse width based on the
error. Intersil’s patented current-balance method is illustrated
in Figure 6, with error correction for channel 1 represented.
In the figure, the cycle average current combines with the
channel 1 sample, I
I
n
ISEN
ISL6565B INTERNAL CIRCUIT
=
K I
SAMPLE
resistor connected from the V
⋅
HOLD
L
FIGURE 5. DCR SENSING CONFIGURATION
&
I
n
⋅
----------------- -
R
DCR
ISL6605
ISEN
I
SEN
ISEN
C
PWM(n)
is equal to the voltage drop across the
1
, to create an error signal I
. The regulator should have only one
C
n
+
-
, from each active channel are
, is then replicated across the
V
IN
ISEN(n)
ICOMMON
INDUCTOR
R
1
L
V
*R
L
ISEN
I
(s)
L
OUT
2
V
C
is OPTIONAL
V
DCR
R
-
(s)
C
C
2*
is proportional to
(s)
plane to the
-
-
ER
AVG
December 1, 2005
R
ISEN
.
C
V
,
OUT
(EQ. 9)
OUT
FN9135.4
SEN
)