ISL6565ACBZ Intersil, ISL6565ACBZ Datasheet - Page 21

• Manufacturer Part Number: ISL6565ACBZ
• Description: IC CTRLR PWM MULTIPHASE 28-SOIC
• Manufacturer: Intersil

Specifications of ISL6565ACBZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1.5MHz
• Duty Cycle: 66.7%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 105°C
• Package / Case: 28-SOIC (7.5mm Width)
• Frequency-max: 1.5MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The time constant of this R-C network must match the time
constant of the inductor L/DCR. Follow the steps below to
choose the component values for this R-C network.
Due to errors in the inductance or DCR it may be necessary
to adjust the value of R
constants correctly.
Once the R-C network components have been chosen, use
Equation 29 to calculate the value of R
DCR is the DCR of the output inductor at room temperature,
I
phases.
Adjusting Phase Currents (ISL6565B Only)
Layout issues in the core-power regulator may cause the
currents in each phase to be slightly unbalanced. This
problem can be resolved without any changes to the layout or
any significant cost increase. The solution requires populating
R
resistor divider ratio, K, for each phase. The time constant of
each new resistor divider R-C sense network must match the
time constant of the old sense network. Follow the steps
R
FL
1. Choose an arbitrary value for C. The recommended value
2. Plug the Inductor L and DCR component values, and the
2
ISEN
in certain phases (as shown in Figure 16) to create a
is the full load operating current, and N is the number of
is 0.01µF.
values for C chosen in steps 1, into Equation 28 to
calculate your value for R
R
1
=
=
FIGURE 16. DCR SENSING CONFIGURATION
--------------------------------- -
70
--------------------- -
DCR C
DCR I
ISL6605
×
L
10
⋅
⋅
–
6
PWM(n)
FL
⋅
N
ISL6565B
1
for each phase to match the time
V
IN
21
1
. Do not populate R
ISEN(n)
ICOMMON
R
INDUCTOR
1
L
V
L
I
ISEN
(s)
L
V
C
DCR
R
-
(s)
C
2
. In Equation 29,
-
R
ISEN
I
SEN
2
C
ISL6565A, ISL6565B
.
V
OUT
OUT
(EQ. 28)
(EQ. 29)
below to choose the component values for the resistor
divider R-C network for each phase.
After calculating the new resistor divider sense resistors, the
phases will be balanced. It may be necessary to adjust the
R
desired I
dividers.
The phase currents might also have to be adjusted if the
components of one or more phases are inhibited from
effectively dissipating their heat so that the affected phases
run hotter than desired. In this case it may be necessary to
adjust the resistor divider ratio of one or more of the R-C
networks. Doing so adjusts the current through affected
phases and can balance the temperatures of each phase.
Choose R
in temperature, as described in Equations 33 and 34, in order
to cause less current to flow in the hotter phase.
In Equations 33 and 34, ∆T
above the ambient temperature, and ∆T
temperature rise above the ambient temperature. It is
R
R
1. Load the regulator to full load and allow the board to heat
2. Measure the current flowing through each phase,
3. Individually, plug the values for each low phase current,
4. For each phase, calculate the values for the new R-C
ISEN
1 new
2 new
,
,
until the output voltage stabilizes (usually several
minutes).
labeling the highest phase current, I
lower phase currents I
I
current, I
Equation 30 to calculate the resistor divider ratio, K
for each low phase. (NOTE: The phase with the highest
phase current is the reference phase and it will not use a
resistor divider network, keeping its resistor divider ratio
equal to 1.)
network sense resistors, R
in each phase’s new resistor divider ratio, K
each phase’s present sense resistor R
31 and 32.
K
R
R
LOW
LOW
1 new
2 new
,
,
resistor slightly to correct for any changes in the
=
=
SEN
(n), the highest phase current, I
n ( )
1,new
R
-------------------------------------------------- -
R
n ( )
n ( )
1
1
LOAD
+
∆T
----------
∆T
current that results from adding the resistor
=
=
=
R
R
1
and R
2
1
2
------------------------ -
K
---------------------------------- -
1 K
1
+
⋅
, and the number of phases, N, into
LOW
⋅
R
–



I
-------------------------------------------- -
R
LOW
1
1
R
2
n ( )
–
LOW
1
2,new
I
n ( )
n ( )
∆
--------- -
∆
LOAD
n ( ) I
T
T
1
2
n ( )
LOW



2
–
in relation to the desired change
is the desired temperature rise
⁄
HIGH
N
1,new
(1) and I
and R
1
LOW
HIGH
HIGH
is the measured
2,new
1
, into Equations
(2).
, and the other,
, the full load
, by plugging
LOW
December 1, 2005
, and
(EQ. 34)
(EQ. 30)
(EQ. 31)
(EQ. 32)
(EQ. 33)
FN9135.4
LOW
,