ISL6569ACR Intersil, ISL6569ACR Datasheet - Page 10

• Manufacturer Part Number: ISL6569ACR
• Description: IC CTRLR PWM BUCK 2PHASE 32-QFN
• Manufacturer: Intersil

Specifications of ISL6569ACR

• Pwm Type: Voltage/Current Mode
• Number Of Outputs: 1
• Frequency - Max: 2MHz
• Duty Cycle: 75%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Frequency-max: 2MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

.
Current Sensing
During the forced off time following a PWM transition low, the
controller senses channel load current by sampling the voltage
across the lower MOSFET r
amplifier, internal to the ISL6569A, connects to the PHASE
node through a resistor, R
equivalent to the voltage drop across the r
MOSFET while it is conducting. The resulting current into the
ISEN pin is proportional to the channel current, I
current is then sampled and held after sufficient settling time
every switching cycle. The sampled current is used for channel-
current balance, load-line regulation, overcurrent protection,
and module current sharing.
The circuitry shown in Figure 4 represents channel-1 of a
two channel converter. This circuitry is repeated for
channel-2 of the converter. From Figure 4, the following
equation for channel-1 sampled current, I
where I
If r
sense resistor in series with the lower MOSFET source can
serve as a sense element.
Channel-Current Balance
The sampled current from both channels, I
to gauge both overall load current and the relative channel
current carried in each leg of the converter. The individual
sample currents are averaged. The resulting average
current, I
demand on the converter and the appropriate level of
I
SAMPLED
CURRENT
1
SAMPLE
DS(ON)
HOLD
FIGURE 4. CHANNEL 1 INTERNAL AND EXTERNAL
=
ISL6569A INTERNAL CIRCUIT
I
&
1
I
L1
L1
I
SEN
r
----------------------
AVG
DS ON
R
is half of the total load current.
sensing is not desired, an independent current-
ISEN
(
, provides a measure of the total load current
=
CURRENT-SENSING CIRCUITRY
I
L1
)
r
------------------------- -
+
-
DS ON
R
ISEN
(
ISEN
)
DS(ON)
10
. The voltage across R
ISEN1
EXTERNAL CIRCUIT
CHANNEL 1
LOWER MOSFET
. A ground-referenced
R
ISEN
DS(ON)
1
V
, is derived
1
IN
and I
+
CHANNEL 1
UPPER MOSFET
-
L
I L1 r DS ON
. The ISEN
of the lower
2
, is used
I
ISEN
L1
(
(EQ. 3)
is
)
ISL6569A
channel current. Using Figures 4 and 6, the average current
is defined as:
where I
The average current is then subtracted from the individual
channel sample currents. The resulting error current, I
then filtered before it adjusts V
signal is compared to a sawtooth ramp signal and produces
a pulse width which corrects for any unbalance and drives
the error current toward zero. Figure 6 illustrates Intersil’s
patented current balance method as implemented on one
channel of a multi-phase converter.
Two considerations designers face are MOSFET selection
and inductor design. Both are significantly improved when
channel currents track at any load level. The need for
complex drive schemes for multiple MOSFETs, exotic
magnetic materials, and expensive heat sinks is avoided.
Resulting in a cost-effective and easy to implement solution
relative to single-phase conversion. Channel current balance
insures the thermal advantage of multi-phase conversion is
realized. Heat dissipation is spread over multiple channels
and a greater area than single phase approaches.
In some circumstances, it may be necessary to deliberately
design some channel-current unbalance into the system. In
a highly compact design, one channel may be able to cool
more effectively than the other due to nearby air flow or heat
sinking components. The other channel may have more
difficulty cooling with comparatively less air flow and heat
sinking. The hotter channel may also be located close to
other heat-generating components tending to drive it’s
temperature even higher. In these cases, the proper
selection of the current sense resistors (R
introduces channel current unbalance into the system.
Increasing the value of R
decreasing it in the hotter channel moves both channels into
thermal balance at the expense of current balance.
I
I
AVG
AVG
V
FIGURE 5. CHANNEL-1 PWM FUNCTION AND CURRENT-
COMP
=
=
OUT
I
--------------- -
I
------------ -
1
OUT
2
+
2
I
is the total load current.
2
r
----------------------
BALANCE ADJUSTMENT
DS ON
R
+
I
ISEN
ER
-
+
(
f(jω)
I
1
)
-
I
AVG
SAWTOOTH SIGNAL
ISEN
÷
in the cooler channel and
COMP
2
+
-
. The modified V
ISEN
Σ
December 29, 2004
in Figure 4)
PWM1
COMP
I
FN9092.2
ER
(EQ. 4)
2
, is