ISL6569ACR Intersil, ISL6569ACR Datasheet - Page 16

• Manufacturer Part Number: ISL6569ACR
• Description: IC CTRLR PWM BUCK 2PHASE 32-QFN
• Manufacturer: Intersil

Specifications of ISL6569ACR

• Pwm Type: Voltage/Current Mode
• Number Of Outputs: 1
• Frequency - Max: 2MHz
• Duty Cycle: 75%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Frequency-max: 2MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

current (see Equation 1); d is the duty cycle (V
L is the per-channel inductance.
An additional term can be added to the lower-MOSFET loss
equation to account for additional loss accrued during the
dead time when inductor current is flowing through the
lower-MOSFET body diode. This term is dependent on the
diode forward voltage at I
f
beginning and the end of the lower-MOSFET conduction
interval respectively.
Thus the total maximum power dissipated in each lower
MOSFET is approximated by the summation of P
UPPER MOSFET POWER CALCULATION
In addition to r
MOSFET losses are due to currents conducted across the
input voltage (V
higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Q
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 15,
the required time for this commutation is t
approximated associated power loss is P
The upper MOSFET begins to conduct and this transition
occurs over a time t
loss is P
A third component involves the lower MOSFET’s reverse-
recovery charge, Q
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can draw all of Q
P
P
P
P
S
L
D
UP 1 ,
UP 2 ,
; and the length of dead times, t
=
=
r
V
≈
≈
DS ON
D ON
V
V
UP,2
(
IN
(
IN





I
----- -
.
)
I
----- -
)
2
M
2
M
f
S
DS(ON)



+
–
IN
I
----- -
2
M


I
-------- -
I
-------- -
PP
PP
I
----- -
) during switching. Since a substantially



2
2
2
M
2
rr
rr
2
(
 t

 t


+
. In Equation 16, the approximate power
. Since the inductor current has fully
; and the upper MOSFET r
1 d






I
-------- -
losses, a large portion of the upper-
----
–
----
2
PP
2
2
2
1






M
)
 t

f
f
S
+
S
, V
d1
I
--------------------------------
L PP
16
D(ON)
,
+
2



12
(
I
----- -
d1
M
2
1 d
; the switching frequency,
–
–
and t
I
-------- -
PP
)
2
rr



UP,1
1
, it is conducted
d2
t
d2
and the
, at the
.
OUT
DS(ON)
L
/V
and P
IN
(EQ. 13)
(EQ. 14)
(EQ. 15)
(EQ. 16)
); and
D
.
ISL6569A
through the upper MOSFET across VIN. The power
dissipated as a result is P
Finally, the resistive part of the upper MOSFET’s dissipation
is given in Equation 18 as P
In this case, of course, r
upper MOSFET.
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 15, 16, 17 and 18. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process that involves
repetitively solving the loss equations for different MOSFETs
and different switching frequencies until converging upon the
best solution.
Current Sensing
The ISEN pins are denoted ISEN1 and ISEN2. The resistors
connected between these pins and their respective phase
nodes determine the gain in the load-line regulation loop and
the channel-current balance loop. Select the values for these
resistors based on the room temperature r
lower MOSFETs; the full-load operating current, I
according to Equation 19 (see also Figure 4).
In certain circumstances, it may be necessary to adjust the
value of one or both of the ISEN resistors. This can arise
when the components of one channel are inhibited from
dissipating their heat so that the affected channel runs hotter
than desired (see the section entitled Channel-Current
Balance). In this case, chose a new, smaller value of R
for the affected phase. Choose R
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
In Equation 20, make sure that ∆T
rise above the ambient temperature, and ∆T
temperature rise above the ambient temperature. While a
single adjustment according to Equation 20 is usually
sufficient, it may occasionally be necessary to adjust R
two or more times to achieve perfect thermal balance between
both channels.
P
P
R
R
UP 3 ,
UP 4 ,
ISEN
ISEN 2 ,
≈
=
=
V
r
=
IN
DS ON
---------------------- -
50 10
r
DS ON
R
Q
×
(
ISEN
rr
(
f
S
–
)
6
)



∆T
----------
∆T
I
------- -
I
----- -
2
FL
M
2
2
1



2
d
DS(ON)
+
UP,3
I
--------- -
PP
12
UP,4
2
and is approximately
is the on resistance of the
.
ISEN,2
2
is the desired temperature
in proportion to the
DS(ON)
1
is the measured
December 29, 2004
FL
of the
;
(EQ. 17)
(EQ. 18)
(EQ. 19)
(EQ. 20)
ISEN
ISEN
FN9092.2