DK-DEV-4SE530N Altera, DK-DEV-4SE530N Datasheet - Page 17

KIT DEV STRATIX IV FPGA 4SE530

DK-DEV-4SE530N

Manufacturer Part Number
DK-DEV-4SE530N
Description
KIT DEV STRATIX IV FPGA 4SE530
Manufacturer
Altera
Series
Stratix® IVr
Type
FPGAr
Datasheet

Specifications of DK-DEV-4SE530N

Contents
Board, Cables, CD, DVD, Power Supply
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Stratix
Silicon Core Number
EP4S
Silicon Family Name
Stratix IV E
Rohs Compliant
Yes
For Use With/related Products
EP4SE530
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2605

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Part Number:
DK-DEV-4SE530N
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Introduction
Setting Up the Board
© May 2010 Altera Corporation
f
1
The instructions in this chapter explain how to set up the Stratix IV E FPGA
development board.
To prepare and apply power to the board, perform the following steps:
1. The Stratix IV E FPGA development board ships with its board switches
2. The FPGA development board ships with design examples stored in the flash
3. Connect the DC adapter (+16 V, 3.75 A) to the DC power jack (J22) on the FPGA
4. Set the POWER switch (SW3) to the on position. When power is supplied to the
The MAX II device on the board contains (among other things) a parallel flash loader
(PFL) megafunction. When the board powers up, the PFL reads a design from flash
memory and configures the FPGA. The PGM CONFIG SELECT rotary switch (SW5)
controls which design to load. When the switch is in the 0 position, the PFL loads the
design from the factory portion of flash memory. When the switch is in the 1 position,
the PFL loads the design from the user hardware portion of flash memory.
The kit includes a MAX II design which contains the MAX II PFL megafunction. The
design resides in the <install dir>\kits\stratixIVE_4se530_fpga\examples\max2
directory.
When configuration is complete, the CONF DONE LED (D22) illuminates, signaling
that the Stratix IV E device configured successfully.
For more information about the PFL megafunction, refer to
Flash Loader with the Quartus II
preconfigured to support the design examples in the kit. If you suspect your board
might not be currently configured with the default settings, follow the instructions
in
settings before proceeding.
memory device. Verify the PGM CONFIG SELECT rotary switch (SW5) is set to the
0 position to load the design stored in the factory portion of flash memory.
Figure 4–1
board.
board and plug the cord into a power outlet.
c
board, a blue LED (D21) illuminates indicating that the board has power.
“Factory Default Switch Settings” on page 4–2
Use only the supplied power supply. Power regulation circuitry on the
board can be damaged by power supplies with greater voltage.
shows the switch location on the Stratix IV E FPGA development
Software.
4. Development Board Setup
to return the board to its factory
Stratix IV E FPGA Development Kit User Guide
AN 386: Using the Parallel

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