DK-DEV-4SE530N Altera, DK-DEV-4SE530N Datasheet - Page 36

• Manufacturer Part Number: DK-DEV-4SE530N
• Description: KIT DEV STRATIX IV FPGA 4SE530
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SE530N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV E
• Rohs Compliant: Yes
• For Use With/related Products: EP4SE530
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2605

6–10
Figure 6–5. The DDR3 Tab
Stratix IV E FPGA Development Kit User Guide
The following sections describe the controls on the DDR3 tab.
Start
The Start control initiates DDR3 memory transaction performance analysis.
Stop
The Stop control terminates transaction performance analysis.
Performance Indicators
These controls display current transaction performance analysis information collected
since you last pressed Start:
■
Write, Read, and Total performance bars—Show the percentage of maximum
theoretical data rate that the requested transactions are able to achieve.
© May 2010 Altera Corporation
Chapter 6: Board Test System
Using the Board Test System