DK-DEV-4SE530N Altera, DK-DEV-4SE530N Datasheet - Page 35

• Manufacturer Part Number: DK-DEV-4SE530N
• Description: KIT DEV STRATIX IV FPGA 4SE530
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SE530N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV E
• Rohs Compliant: Yes
• For Use With/related Products: EP4SE530
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2605

Chapter 6: Board Test System
Using the Board Test System
The DDR3 Tab
© May 2010 Altera Corporation
1
1
Flash
The Flash control allows you to read and write the flash memory on your board. Type
a starting address in the text box and click Read. Values starting at the specified
address appear in the table. The base address of flash memory in this Nios II-based
BTS design is 0x0800.0000. The valid address range within the 64-MB flash memory is
0x0000.0000 through 0x03FF.FFFF, as shown in the GUI.
If you enter an address outside of the 0x0000.0000 to 0x003F.FFFF flash memory
address space, a warning message identifies the valid flash memory address range.
To update the flash memory contents, change values in the table and click Write. The
application writes the new values to flash memory and then reads the values back to
guarantee that the graphical display accurately reflects the memory contents.
To prevent overwriting the dedicated portions of flash memory, the application limits
the writable flash memory address range from 0x03FE.0000 to 0x003F.FFFF (which
corresponds to the unused flash memory address range shown in
page 6–2
The DDR3 tab allows you to read and write the DDR3 memory on your board.
Figure 6–5
and
shows the DDR3 tab.
Table A–1 on page
A–1).
Stratix IV E FPGA Development Kit User Guide
Figure 6–1 on
6–9