DK-DEV-4SE530N Altera, DK-DEV-4SE530N Datasheet - Page 19

• Manufacturer Part Number: DK-DEV-4SE530N
• Description: KIT DEV STRATIX IV FPGA 4SE530
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SE530N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV E
• Rohs Compliant: Yes
• For Use With/related Products: EP4SE530
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2605

Chapter 4: Development Board Setup
Factory Default Switch Settings
Table 4–1. SW1 Dip Switch Settings
© May 2010 Altera Corporation
1
2
3
4
Switch
CLK50_EN
CLK66_EN
CLK100_EN
CLK125_EN
Board
Label
Figure 4–2. Switch Locations and Default Settings on the Board Bottom
To restore the switches to their factory default settings, perform the following steps:
1. Set the PGM CONFIG SELECT rotary switch (SW5) to the 0 position, as shown in
2. Set DIP switch bank (SW1) to match
Figure
DDR3_TEST_HDR
Switch 1 has the following options:
■
■
Switch 2 has the following options:
■
■
Switch 3 has the following options:
■
■
Switch 4 has the following options:
■
■
When on, the 50 Mhz clock is disabled.
When off, the 50 Mhz clock is enabled.
When on, the 66 Mhz clock is disabled.
When off, the 66 Mhz clock is enabled.
When on, the 100 Mhz clock is disabled.
When off, the 100 Mhz clock is enabled.
When on, the 125 Mhz clock is disabled
When off, the 125 Mhz clock is enabled
4–1.
J29
RLD_ZQ_IMPED
J28
50
60
MAX
Function
Table 4–1
and
Stratix IV E FPGA Development Kit User Guide
Figure
4–2.
Position
Default
Off
Off
Off
Off
4–3