AT91SAM9XE512-QU Atmel, AT91SAM9XE512-QU Datasheet - Page 94
AT91SAM9XE512-QU
Manufacturer Part Number
AT91SAM9XE512-QU
Description
MCU ARM9 512K FLASH 208-PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9XE128-QU.pdf
(860 pages)
Specifications of AT91SAM9XE512-QU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Controller Family/series
AT91SAM9xxxxx
No. Of I/o's
96
Ram Memory Size
32KB
Cpu Speed
180MHz
No. Of Timers
2
Rohs Compliant
Yes
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, EBI, I2S, SPI, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
96
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Package
208PQFP
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
180 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
For Use With
AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9XE512-QU
Manufacturer:
VISHAY
Quantity:
40 000
Company:
Part Number:
AT91SAM9XE512-QU
Manufacturer:
Atmel
Quantity:
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14.3
14.3.1
Table 14-17. Signal Description List
94
Signal Name
VDDBU
VDDIO
VDDCORE
VDDPLL
GND
XIN
Serial Fast Flash Programming
AT91SAM9XE128/256/512 Preliminary
Device Configuration
Function
Backup Power Supply
I/O Lines Power Supply
Core Power Supply
PLL Power Supply
Ground
Main Clock Input.
This input can be tied to GND. In this
case, the device is clocked by the internal
RC oscillator.
The Serial Fast Flash programming interface is based on IEEE Std. 1149.1 “Standard Test
Access Port and Boundary-Scan Architecture”. Refer to this standard for an explanation of terms
used in this chapter and for a description of the TAP controller states.
In this mode, data read/written from/to the embedded Flash of the device are transmitted
through the JTAG interface of the device.
In Serial Fast Flash Programming Mode, the device is in a specific test mode. Only a distinct set
of pins is significant. Other pins must be left unconnected.
Figure 14-4. Serial Programming
0-50MHz
VDDBU
VDDIO
VDDIO
GND
GND
TDO
TMS
TCK
TDI
Clocks
Power
TST
PGMEN0
PGMEN1
PGMEN2
PGMEN3
XIN
Ground
Power
Power
Power
Power
Type
Input
Active
Level
Comments
32 kHz to 50 MHz
GND
VDDIO
VDDPLL
VDDCORE
6254C–ATARM–22-Jan-10
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