P87C591VFA/00,512 NXP Semiconductors, P87C591VFA/00,512 Datasheet - Page 11

• Manufacturer Part Number: P87C591VFA/00,512
• Description: IC 80C51 MCU 16K OTP 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C591VFA/00,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: CAN, EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN, I2C, UART
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-1256-5; 935268182512; P87C591VFAA

Philips Semiconductors
Notes
1. To avoid “latch-up” effect as power-on, the voltage on any pin at any time must not be higher or lower than V
2. Not implemented for P1.6 and P1.7.
2000 Jul 26
P1.0 to P1.4
P1.5 to P1.7
P1.0
P1.1
P1.2 to P1.4
P1.5 to P1.7
P1.5
P1.6
P1.7
PWM0
PWM1
Single-chip 8-bit microcontroller with CAN controller
or V
SYMBOL
SS
0.5 V.
40 to 44
1 to 3
40
41
42 to 44 4 to 6
1 to 3
1
2
3
6
28
QFP44 PLCC44
PIN
2 to 6
7 to 9
2
3
7 to 9
7
8
9
12
34
Port 1: 8-bit I/O port with a user configurable output type. The operation of
Port 1 pins as inputs or outputs depends upon the port configuration selected.
Each port pin is configured independently.
Port 1 also provides various special functions as described below:
RXDC: CAN Receiver input line.
TXDC: CAN Transmit output line.
During reset, Port P1.0 and P1.1 will be asynchronously driven resistive
HIGH, P1.2 to P1.7 is High-Impedance (Tri-state).
CT0I/INT2 / CT1I/INT3 / CT2I/INT4: T2 Capture timer inputs or External
Interrupt inputs.
ADC0 to ADC2: Alternate function: Input channels to ADC.
ADC3 to ADC5: Input channels to ADC:
CT3I/INT5: T2 Capture timer input or External Interrupt inputs.
SCL: Serial port clock line I
implemented at I
SDA: Serial data clock line I
implemented at I
Port 1 has four modes selected on a per bit basis by writing to the P1M1 and
P1M2 registers as follows:
P1M1.x
Port 1 is also used to input the lower order address byte during EPROM
programming and verification. A0 is on P1.0, etc.
Pulse Width Modulation: Output 0.
Pulse Width Modulation: Output 1.
0
0
1
1
P1M2.x
0
1
0
1
11
2
2
C.
C.
Mode Description
Pseudo-bidirectional (standard c51 configuration default
(2)
Push-Pull
High impedance Open drain
)
2
2
C. Push-pull or pseudo bidrectional modes is not
C.Push-pull or pseudo bidrectional modes is not
(2)
DESCRIPTION
Preliminary Specification
P8xC591
DD
0.5 V