P87C591VFA/00,512 NXP Semiconductors, P87C591VFA/00,512 Datasheet - Page 76

• Manufacturer Part Number: P87C591VFA/00,512
• Description: IC 80C51 MCU 16K OTP 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C591VFA/00,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: CAN, EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN, I2C, UART
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-1256-5; 935268182512; P87C591VFAA

Philips Semiconductors
15.2
Figure 32 shows how the on-chip I
implemented, and the following text describes the
individual blocks.
15.2.1
The input filters have I
input voltage is less than 1.5 V, the input logic level is
interpreted as 0; if the input voltage is greater than 3.0 V,
the input logic level is interpreted as 1. Input signals are
synchronized with the internal clock (f
shorter than three oscillator periods are filtered out.
The output stages consist of open drain transistors that
can sink 3 mA at V
do have clamping diodes to V
to be considered, if a powered-down 8xC591 on one board
clamps the I
15.2.2
This 8-bit special function register may be loaded with the
7-bit slave address (7 most significant bits) to which SIO1
will respond when programmed as a slave transmitter or
receiver. The LSB (GC) is used to enable general call
address (00H) recognition.
15.2.3
The comparator compares the received 7-bit slave
address with its own slave address (7 most significant bits
in S1ADR). It also compares the first received 8-bit byte
with the general call address (00H). If an equality is found,
the appropriate status bits are set and an interrupt is
requested.
2000 Jul 26
Single-chip 8-bit microcontroller with CAN controller
SIO1 Implementation and Operation
I
A
C
NPUT
DDRESS
OMPARATOR
2
C bus externally.
F
ILTERS AND
R
OUT
EGISTER
2
< 0.4 V. These open drain outputs
C compatible input levels. If the
O
, S1ADR
UTPUT
DD
. Thus, precautions have
2
C bus interface is
S
CLK
TAGES
/4), and spikes
76
15.2.4
This 8-bit special function register contains a byte of serial
data to be transmitted or a byte which has just been
received. Data in S1DAT is always shifted from right to left;
the first bit to be transmitted is the MSB (bit 7) and, after a
byte has been received, the first bit of received data is
located at the MSB of S1DAT. While data is being shifted
out, data on the bus is simultaneously being shifted in;
S1DAT always contains the last byte present on the bus.
Thus, in the event of lost arbitration, the transition from
master transmitter to slave receiver is made with the
correct data in S1DAT.
S
HIFT
R
EGISTER
, S1DAT
Preliminary Specification
P8xC591