P87C591VFA/00,512 NXP Semiconductors, P87C591VFA/00,512 Datasheet - Page 71

• Manufacturer Part Number: P87C591VFA/00,512
• Description: IC 80C51 MCU 16K OTP 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C591VFA/00,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: CAN, EBI/EMI, I²C, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: CAN, I2C, UART
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-1256-5; 935268182512; P87C591VFAA

Philips Semiconductors
14.5
The UART operates in all of the usual modes that are
described in the Section of Standard Serial Interface,
80C51-Based 8-Bit Microcontrollers. In addition the UART
can perform framing error detect by looking for missing
stop bits, and automatic address recognition. The UART
also fully supports multiprocessor communication as does
the standard 80C51 UART.
When used for framing error detect the UART looks for
missing stop bits in the communication. A missing bit will
set the FE bit in the S0CON register. The FE bit shares the
S0CON.7 bit with SM0 and the function of S0CON.7 is
determined by PCON.6 (SMOD0) see Table 50. If SMOD0
is set then S0CON.7 functions as FE. S0CON.7 functions
as SM0 when SMOD0 is cleared. When as FE S0CON.7
can only be cleared by software. Refer to Figure 25.
14.5.2
Table 49 Serial Port Control Register (address 98H)
Table 50 Description of S0CON bits
2000 Jul 26
Single-chip 8-bit microcontroller with CAN controller
SM0/FE
BIT
7
6
5
4
3
2
1
0
7
Enhanced UART
S
ERIAL
SYMBOL
SM0
SM1
SM2
REN
RB8
TB8
FE
RI
TI
P
ORT
SM1
6
C
ONTROL
Framing Error bit. This bit is set by the receiver when an invalid stop bit is detected. The FE
bit is not cleared by valid frames but should be cleared by software.
Serial Port Mode Bit 0, (SMOD0 must = 0 to access bit SM0), see Table 46.
These bits are used to select the serial port mode; see Table 46.
Enables the Automatic Address Recognition feature in Modes 2 and 3. If SM2 = 1, then RI
will not be set unless the received 9
received byte is a Given or Broadcast Address. In Mode 1, if SM2 = 1, then RI will not be
activated unless a valid stop bit was not received, and the received byte is a Given or
Broadcast Address. In Mode 0, SM2 should be a logic 0.
Enables serial reception. Set by software to enable reception. Clear by software to disable
reception.
The 9
In modes 2 and 3, the 9
that was received. In Mode 0, RB8 is not used.
Transmit Interrupt flag. Set by hardware at the end of the 8
beginning of the stop bit in the other modes, in any serial transmission. Must be cleared by
software.
Receive Interrupt flag. Set by hardware at the end of the 8
through the stop bit time in the other modes, in any serial reception (except see SM2). Must
be cleared by software.
th
R
data bit that will be transmitted in Modes 2 and 3. Set or clear by software as desired.
EGISTER
SM2
5
(S0CON)
th
REN
data bit that was received. In Mode 1, if SM2 = 0, RB8 is the stop bit
4
71
th
14.5.1
Automatic Address Recognition is a feature which allows
the UART to recognize certain addresses in the serial bit
stream by using hardware to make the comparisons. This
feature saves a great deal of software overhead by
eliminating the need for the software to examine every
serial address which passes by the serial port. This feature
is enabled by setting the SM2 bit in S0CON. In the 9 bit
UART modes, mode 2 and mode 3, the Receive Interrupt
flag (RI) will be automatically set when the received byte
contains either the “Given” address or the “Broadcast”
address. The 9 bit mode requires that the 9th information
bit is a 1 to indicate that the received information is an
address and not data. Automatic address recognition is
shown in Figure 29.
The 8 bit mode is called Mode 1. In this mode the RI flag
will be set if SM2 is enabled and the information received
has a valid stop bit following the 8 address bits and the
information is either a Given or Broadcast address.
data bit (RB8) is a logic 1, indicating an address, and the
DESCRIPTION
TB8
3
A
UTOMATIC
RB8
2
A
DDRESS
th
th
bit time in Mode 0, or halfway
bit time in Mode 0, or at the
R
ECOGNITION
Preliminary Specification
TI
1
P8xC591
RI
0