MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 1406

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC561MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Fetch serialized 23-1
FEX bit 3-14
FI 3-15
Final sample time 13-35
Floating-point
FORMERR 16-34
FP bit 3-21
FPECR 3-26
FPRF 3-15
FPRs 3-12
FPSCK 19-20
FPSCR 3-13
FPU 3-5
FPUVE 23-42
FPUVEE 23-44
F
FQD D-35
FQM D-10
FR 3-15
Frame
Index-6
QCLK
bus interface, 9-1
available 3-21
enabled exception summary 3-14
exception mode 3-21
exception summary 3-14
fraction inexact 3-15
fraction rounded 3-15
inexact exception 3-14
invalid operation exception
invalid operation exception for invalid integer
invalid operation exception for invalid square root 3-15
invalid operation exception for software request 3-15
overflow exception 3-14
registers 3-12
result flags 3-15
rounding control 3-16
status and control register 3-13
underflow exception 3-14
unit 3-5
zero divide exception 3-14
size 15-58
enable 3-15
enable 3-15
for ×*0 3-14
for ×/× 3-14
for ×-× 3-14
for 0/0 3-14
for invalid compare 3-15
for SNaN 3-14
summary 3-14
enable 3-15
convert 3-15
13-47
,
14-48
,
,
3-22
14-36
,
3-15
MPC561/MPC563 Reference Manual, Rev. 1.2
Frames
Framing error (FE) flag 15-50
FREEZ ACK 16-18
FREEZE
Freeze
FREEZE (internal signal) 13-10
freeze operation 6-23
Frequency measurement (FQM) D-10
FRZ 13-8
FRZACK 16-13
FULL
Function
FX bit 3-14
G
general purpose chip-select machine 10-3
General SPRs 3-24
General-purpose registers (GPRs) 3-12
Global registers 13-7
GPCM 10-3
H
Hall effect decode (HALLD) D-20
HALLD D-20
HALT 15-21
Halt
HALTA 15-22
HALTA and MODF Interrupt Enable (HMIE) 15-42
HALTA/MODF interrupt enable (HMIE) bit 15-21
Hang on T4 (HOT4) 19-12
hard reset 7-2
hard reset configuration word (RCW) 7-11
HMIE 15-21
HOT4 19-12
HRESET 7-2
HSQR 19-16
HSSR 19-17
I
IBRK 23-43
overload 16-17
remote 16-17
assertion response (FRZ)
enable (FRZ) 13-8
mode 13-9
parameters D-12
receive message buffer code 16-5
library for TPU 19-4
acknowledge flag (HALTA) 15-22
QSPI (HALT) 15-21
QSM 15-6
TPU 19-13
,
14-8
,
16-13
,
16-13
,
14-8
,
19-13
,
,
23-29
15-57
,
Freescale Semiconductor
13-30
,
14-9
,
14-31

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