MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 181

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

3.12
The RCPU processor is pipelined. Because the processing of an instruction is broken into a series of stages,
an instruction does not require the processor’s full resources.
Freescale Semiconductor
1
Vector Offset
01500–01BFF
This exception will not be generated by hardware.
00C00
00D00
01C00
01D00
00A00
00B00
00E00
01E00
01F00
00600
00700
00800
00900
01000
01100
01200
01300
01400
(hex)
Instruction Timing
Non-Maskable External Breakpoint
Implementation-Dependent Data
Implementation-Dependent
Implementation-Dependent
Implementation-Dependent
Implementation-Dependent
Implementation-Dependent
Implementation-Dependent
Floating-Point Unavailable
Instruction Breakpoint
Protection Exception
Floating-Point Assist
Software Emulation
External Breakpoint
Table 3-19. Exception Vector Offset Table (continued)
Exception Type
Data Breakpoint
Protection Error
Decrementer
System call
Instruction
Alignment
Reserved
Reserved
Reserved
Reserved
Reserved
Maskable
Program
Trace.
MPC561/MPC563 Reference Manual, Rev. 1.2
Section 3.15.4.12, “Floating-Point Assist Exception
Section 3.15.4.15, “Implementation-Specific Data Protection
Section 3.15.4.14, “Implementation-Dependent Instruction
Section 3.15.4.13, “Implementation-Dependent Software
Section 3.15.4.8, “Floating-Point Unavailable Exception
Section 3.15.4.16, “Implementation-Dependent Debug
Section 3.15.4.16, “Implementation-Dependent Debug
Section 3.15.4.16, “Implementation-Dependent Debug
Section 3.15.4.16, “Implementation-Dependent Debug
Section 3.15.4.10, “System Call Exception
Section 3.15.4.9, “Decrementer Exception
Section 3.15.4.6, “Alignment Exception
Section 3.15.4.7, “Program Exception
Section 3.15.4.11, “Trace Exception
Emulation Exception
Protection Exception
Error Exception
Exceptions”
Exceptions”
Exceptions”
Exceptions”
(0x0800)”
Section
—
—
—
—
—
(0x1400)”
(0x1000)”
(0x1300)”
(0x0D00)”
Central Processing Unit
(0x0700)”
(0x00600)”
(0x0900)”
(0x0C00)”
(0x0E00)”
3-37