MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 829

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC561MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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8:17 SHORT_CH[7:0
Bits
0:7
SRESET
Field
Addr
Name
]
SHORT_CH_REG
SHORT_CH_REG
MSB
Data transmitted
Register Name
0
TX_DATA[0:15]
TX_DATA[0:15]
1
Reserved
Each bit of this field will short a specified pair of channels. Where a pair of channels are shorted,
the data for the shorted channel will be transmitted twice.
Refer to
Figure 18-26. Short Channels Register (SHORT_CH_REG)
SHORT_CH[x] = 0
SHORT_CH7 = 1
SHORT_CH6 = 1
SHORT_CH5 = 1
SHORT_CH4 = 1
SHORT_CH3 = 1
SHORT_CH2 = 1
SHORT_CH1 = 1
SHORT_CH0 = 1
2
Table 18-10. SHORT_CH_REG Bit Descriptions
Table 18-11
RESERVED
Table 18-11. Examples of the SHORT_CH Bits
MPC561/MPC563 Reference Manual, Rev. 1.2
3
Bit
4
for examples that illustrate the effects of enabling SHORT_CH[7:0] bits.
Contents
Register
0x0000
0x1234
0x1234
0x00F0
0x1234
5
No short
TX_DATA1 to TX_DATA0
TX_DATA3 to TX_DATA2
TX_DATA5 to TX_DATA4
TX_DATA7 to TX_DATA6
TX_DATA9 to TX_DATA8
TX_DATA11 to TX_DATA10
TX_DATA13 to TX_DATA12
TX_DATA15 to TX_DATA14
0000_0000_0000_0000
Example 1
Example 2
6
Channel Shorted
0x30 5C28
SHORT_CH[7:0] = 0x00, therefore no shorts enabled
0b 0001 0010 0011 0100
Normal transmission.
SHORT_CH[7:4] = 1, therefore TX_DATA[1, 3, 5, 7]
are enabled for re-transmission.
0b 0001 0010 0011 0100
Underlines show bits to be re-transmitted
7
Description
8
9
10
Comments
TX_DATA1 in TX_DATA0
TX_DATA3 in TX_DATA2
TX_DATA5 in TX_DATA4
TX_DATA7 in TX_DATA6
TX_DATA9 in TX_DATA8
TX_DATA11 in TX_DATA10
TX_DATA13 in TX_DATA12
TX_DATA15 in TX_DATA14
SHORT_CH[7:0]
Peripheral Pin Multiplexing (PPM) Module
Re-transmit (bit time)
11
12
13
14
LSB
15
18-23

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