EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 188

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-CQZ

Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-CQZ

Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137

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7
32 bits per pixel (24 bits per pixel unpacked)
bit 31
bit 31
bit 31
7-6
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7.3.5 Frame Buffer Memory Size
7.3.6 Pulse Width Modulated Brightness
Pixel 3 Red
Unused
Unused
Unused
Byte 3
Byte 7
Byte B
bit 24 bit 23
bit 24 bit 23
bit 24 bit 23
Several screens may be available for video display depending on screen size, pixel depth,
and amount of memory dedicated to video images. The screen size can be up to 1280 x 1024
pixels, the pixel depth can be 4 bpp, 8 bpp, 16 bpp, 24 bpp packed, or 32 bpp (24 bpp
unpacked).
The circuitry provides a pulse width modulated brightness control output, Bright, that can be
used in conjunction with an external resistor and capacitor to provide a DC voltage level for
Byte 6
Compressed images for remapping
1 bit per pixel
bit 31
Pixel
24
Pixel 3 Green
Pixel 0 Red
Pixel 1 Red
Pixel 2 Red
Byte A
Byte 2
As stored in memory
Byte 3
bit 16 bit 15
bit 16 bit 15
bit 16 bit 15
32-bit Word 0
32-bit Word 1
32-bit Word 2
Table 7-2. Byte Oriented Frame Buffer Organization (Continued)
Pixel 0 Green
Pixel 1 Green
Pixel 2 Green
bit 24 bit 23
Pixel 3 Blue
Pixel
Byte 1
Byte 5
Byte 9
31
Pixel
16
bit 8 bit 7
bit 8 bit 7
bit 8 bit 7
Copyright 2007 Cirrus Logic
Byte 2
Pixel 0 Blue
Pixel 1 Blue
Pixel 2 Blue
Pixel 2 Red
Byte 0
Byte 4
Byte 8
32-bit Word
bit 16 bit 15
Pixel
bit 0
bit 0
bit 0
23
Pixel 8
bit 23
bit 15
bit 7
Word 0
Word 0
Word 0
Pixel 0
Byte 2
Green
Byte 1
Byte 0
Blue
Red
Byte1
In pixel output order (progressive scan)
bit 16 bit 23
bit 8 bit 15
bit 0 bit 7
Pixel
bit 8 bit 7
Word 1
Word 1
Word 1
Pixel 1
Byte 6
Green
Byte 5
Byte 4
15
Blue
Red
Pixel
0
bit 16 bit 23
bit 8 bit 15
bit 0 bit 7
Byte 0
Word 2
Word 2
Word 2
Pixel 2
Byte B
Byte A
Byte 8
Green
Blue
Red
bit 16 bit 23
Pixel
bit 8 bit 15
bit 0 bit 7
bit 0
7
DS785UM1
Word 3
Word 3
Word 3
Pixel 3
Byte E
Byte D
Byte C
Green
Blue
Red
bit 16
bit 8
bit 0

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