EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 332
EP9302-CQZ
Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9302-IQZ.pdf
(42 pages)
3.EP9302-IQZ.pdf
(4 pages)
4.EP9302-IQZ.pdf
(40 pages)
Specifications of EP9302-CQZ
Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
EP9302-CQZ
Manufacturer:
Cirrus
Quantity:
3 295
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Part Number:
EP9302-CQZ
Manufacturer:
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- EP9307-CRZ PDF datasheet
- EP9302-IQZ PDF datasheet #2
- EP9302-IQZ PDF datasheet #3
- EP9302-IQZ PDF datasheet #4
- Current page: 332 of 824
- Download datasheet (13Mb)
9
9-30
1/10/100 Mbps Ethernet LAN Controller
EP93xx User’s Guide
9.2.3.10 Transmit Status Queue
The Transmit Status queue is used to pass transmit status from the MAC to the Host. In
operation the status queue is similar to the transmit descriptor queue, it is a circular queue in
contiguous memory space. The location and size of the queue are set at initialization by the
Host writing to the Transmit Status Queue Base Address, and the Transmit Status Queue
Base Length registers. The base address must point to a word aligned memory location. The
length is set to the actual status queue length in bytes. This should be an integral number of
status entries and should not exceed 64 Kbytes total. The Current Address must be set to
point to the first status entry to be used. This would normally be the first entry in the queue
(same value as the base address).
The Host needs to ensure that in operation there is always room in the status queue for any
transmit frame which is enqueued in the transmit descriptor queue.
TBL:
Copyright 2007 Cirrus Logic
Transmit Buffer Length. This field contains the byte count
of the number of bytes in the transmit buffer. There are no
restrictions on the actual buffer size. If the length is set to
zero, the descriptor will be ignored. A frame may not be
terminated with a zero length buffer.
DS785UM1
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