ATMEGA32U4-AU Atmel, ATMEGA32U4-AU Datasheet - Page 151

• Manufacturer Part Number: ATMEGA32U4-AU
• Description: MCU AVR 32K FLASH 16MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32U4-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2.5 KB
• Interface Type: SPI/TWI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 2.5KB
• # I/os (max): 26
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Controller Family/series: AVR MEGA
• No. Of I/o's: 26
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2.5KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATMEGA32U4-16AU; ATMEGA32U4-16AU

15.8.2
7766F–AVR–11/10
Fast PWM Mode
The Output Compare Pin configurations in Normal Mode are described in
Table 15-2.
The fast Pulse Width Modulation or fast PWM mode (PWM4x = 1 and WGM40 = 0) provides a
high frequency PWM waveform generation option. The fast PWM differs from the other PWM
option by its single-slope operation. The counter counts from BOTTOM to TOP (defined as
OCR4C) then restarts from BOTTOM. In non-inverting Compare Output mode the Waveform
Output (OCW4x) is cleared on the Compare Match between TCNT4 and OCR4x and set at
BOTTOM. In inverting Compare Output mode, the Waveform Output is set on Compare Match
and cleared at BOTTOM. In complementary Compare Output mode the Waveform Output is
cleared on the Compare Match and set at BOTTOM.
Due to the single-slope operation, the operating frequency of the fast PWM mode can be twice
as high as the Phase and Frequency Correct PWM mode that use dual-slope operation. This
high frequency makes the fast PWM mode well suited for power regulation, rectification, and
DAC applications. High frequency allows physically small sized external components (coils,
capacitors), and therefore reduces total system cost.
The timing diagram for the fast PWM mode is shown in
mented until the counter value matches the TOP value. The counter is then cleared at the
following timer clock cycle. The TCNT4 value is in the timing diagram shown as a histogram for
illustrating the single-slope operation. The diagram includes the Waveform Output in non-
inverted and inverted Compare Output modes. The small horizontal line marks on the TCNT4
slopes represent Compare Matches between OCR4x and TCNT4.
Figure 15-13. Fast PWM Mode, Timing Diagram
COM4x1
0
0
1
1
TCNTn
OCWnx
OCWnx
Period
(COMnx1:0 = 2)
(COMnx1:0 = 3)
Output Compare Pin Configurations in Normal Mode
1
COM4x0
0
1
0
1
2
3
OC4x Pin
Disconnected
Disconnected
Disconnected
Disconnected
4
5
6
Figure
7
ATmega16/32U4
15-13. The counter is incre-
OC4x Pin
Disconnected
OC4x
OC4x
OC4x
OCRnx Interrupt Flag Set
OCRnx Update and
TOVn Interrupt Flag Set
Table
15-2.
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