AT32UC3B0512-Z2UR Atmel, AT32UC3B0512-Z2UR Datasheet - Page 416

• Manufacturer Part Number: AT32UC3B0512-Z2UR
• Description: IC MCU AVR32 512K FLASH 64QFN
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0512-Z2UR

• Package / Case: 64-QFN
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 60MHz
• Number Of I /o: 44
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Program Memory Size: 512KB (512K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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32059J–12/2010
STOI: Suspend Time-Out Interrupt
ROLEEXI: Role Exchange Interrupt
BCERRI: B-Connection Error Interrupt
VBERRI: VBus Error Interrupt
VBUSTI: VBus Transition Interrupt
IDTI: ID Transition Interrupt
This bit is set when a time-out error (more than 200ms) has been detected after a suspend. This triggers a USB interrupt if
This bit is cleared when the UBSTACLR.STOIC bit is written to one.
This bit shall only be used in host mode.
This bit is set when the USBB has successfully switched its mode because of an negotiation (host to device or device to host).
This bit is cleared when the UBSTACLR.ROLEEXIC bit is written to one.
This bit is set when an error occurs during the B-connection. This triggers a USB interrupt if BCERRE is one.
This bit is cleared when the UBSTACLR.BCERRIC bit is written to one.
This bit shall only be used in host mode.
This bit is set when a VBus drop has been detected. This triggers a USB interrupt if VBERRE is one.
This bit is cleared when the UBSTACLR.VBERRIC bit is written to one.
This bit shall only be used in host mode.
If a VBus problem occurs, then the VBERRI interrupt is generated even if the USBB does not go to an error state because of
This bit is set when a transition (high to low, low to high) has been detected on the USB_VBUS pad. This triggers an USB
This bit is cleared when the UBSTACLR.VBUSTIC bit is written to one.
This interrupt is generated even if the clock is frozen by the FRZCLK bit.
This bit is set when a transition (high to low, low to high) has been detected on the USB_ID input pin. This triggers an USB
This bit is cleared when the UBSTACLR.IDTIC bit is written to one.
This interrupt is generated even if the clock is frozen by the FRZCLK bit.
STOE is one.
This triggers a USB interrupt if ROLEEXE is one.
VBUSHWC is one.
interrupt if VBUSTE is one.
interrupt if IDTE is one.
AT32UC3B
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