AT32UC3B0512-Z2UR Atmel, AT32UC3B0512-Z2UR Datasheet - Page 468

IC MCU AVR32 512K FLASH 64QFN

AT32UC3B0512-Z2UR

Manufacturer Part Number
AT32UC3B0512-Z2UR
Description
IC MCU AVR32 512K FLASH 64QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3B0512-Z2UR

Package / Case
64-QFN
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
96K x 8
Program Memory Size
512KB (512K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number:
AT32UC3B0512-Z2UR
Manufacturer:
ATMEL
Quantity:
2 010
22.8.3.13
Register Name:
Access Type:
Offset:
Reset Value:
32059J–12/2010
PBYCT: Pipe Byte Count
CFGOK: Configuration OK Status
RWALL: Read/Write Allowed
CURRBK: Current Bank
PACKETI
SHORT
31
23
15
7
-
This field contains the byte count of the FIFO.
For OUT pipe, incremented after each byte written by the user into the pipe and decremented after each byte sent to the
For IN pipe, incremented after each byte received from the peripheral and decremented after each byte read by the user from
This field may be updated 1 clock cycle after the RWALL bit changes, so the user should not poll this field as an interrupt bit.
This bit is set/cleared when the UPCFGn.ALLOC bit is set.
This bit is set if the pipe n number of banks (UPCFGn.PBK) and size (UPCFGn.PSIZE) are correct compared to the maximal
If this bit is cleared, the user should rewrite correct values ot the PBK and PSIZE field in the UPCFGn register.
For OUT pipe, this bit is set when the current bank is not full, i.e., the software can write further data into the FIFO.
For IN pipe, this bit is set when the current bank is not empty, i.e., the software can read further data from the FIFO.
This bit is cleared otherwise.
This bit is also cleared when the RXSTALL or the PERR bit is one.
For non-control pipe, this field indicates the number of the current bank.
0
0
1
1
peripheral.
the pipe.
allowed number of banks and size for this pipe and to the maximal FIFO size (i.e., the DPRAM size).
CURRBK
Pipe n Status Register
CURRBK
RXSTALLDI/
CRCERRI
30
22
14
6
UPSTAn, n in [0..6]
Read-Only
0x0530 + (n * 0x04)
0x00000000
PBYCT[3:0]
0
1
0
1
OVERFI
29
21
13
5
Current Bank
Bank0
Bank1
Bank2
Reserved
NBUSYBK
NAKEDI
28
20
12
4
PBYCT[10:4]
PERRI
27
19
11
3
-
-
UNDERFI
TXSTPI/
CFGOK
26
18
10
2
-
TXOUTI
25
17
9
1
-
DTSEQ
AT32UC3B
RWALL
RXINI
24
16
8
0
468

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