AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 621
![IC MCU ARM9 64K SRAM 144LFBGA](/photos/12/13/121356/144-lfbga_sml.jpg)
AT91SAM9R64-CU-999
Manufacturer Part Number
AT91SAM9R64-CU-999
Description
IC MCU ARM9 64K SRAM 144LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9R64-CU.pdf
(903 pages)
Specifications of AT91SAM9R64-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, UART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
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Manufacturer
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Price
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38.7
38.7.1
6289C–ATARM–28-May-09
MultiMedia Card Operations
Command - Response Operation
After a power-on reset, the cards are initialized by a special message-based MultiMedia Card
bus protocol. Each message is represented by one of the following tokens:
Card addressing is implemented using a session address assigned during the initialization
phase by the bus controller to all currently connected cards. Their unique CID number identifies
individual cards.
The structure of commands, responses and data blocks is described in the MultiMedia-Card
System Specification. See also
MultiMediaCard bus data transfers are composed of these tokens.
There are different types of operations. Addressed operations always contain a command and a
response token. In addition, some operations have a data token; the others transfer their infor-
mation directly within the command or response structure. In this case, no data token is present
in an operation. The bits on the DAT and the CMD lines are transferred synchronous to the clock
MCI Clock.
Two types of data transfer commands are defined:
Both read and write operations allow either single or multiple block transmission. A multiple
block transmission is terminated when a stop command follows on the CMD line similarly to the
sequential read or when a multiple block transmission has a pre-defined block count
Transfer Operation” on page
The MCI provides a set of registers to perform the entire range of MultiMedia Card operations.
After reset, the MCI is disabled and becomes valid after setting the MCIEN bit in the MCI_CR
Control Register.
The PWSEN bit saves power by dividing the MCI clock by 2
The two bits, RDPROOF and WRPROOF in the MCI Mode Register (MCI_MR) allow stopping
the MCI Clock during read or write access if the internal FIFO is full. This guarantees data integ-
rity, not bandwidth.
The command and the response of the card are clocked out with the rising edge of the MCI
Clock.
All the timings for MultiMedia Card are defined in the MultiMediaCard System Specification.
• Command: A command is a token that starts an operation. A command is sent from the host
• Response: A response is a token which is sent from an addressed card or (synchronously)
• Data: Data can be transferred from the card to the host or vice versa. Data is transferred via
• Sequential commands: These commands initiate a continuous data stream. They are
• Block-oriented commands: These commands send a data block succeeded by CRC bits.
either to a single card (addressed command) or to all connected cards (broadcast
command). A command is transferred serially on the CMD line.
from all connected cards to the host as an answer to a previously received command. A
response is transferred serially on the CMD line.
the data line.
terminated only when a stop command follows on the CMD line. This mode reduces the
command overhead to an absolute minimum.
623.).
Table 38-4 on page
AT91SAM9R64/RL64 Preliminary
622.
PWSDIV
+ 1 when the bus is inactive.
(See “Data
621
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