AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 683

IC MCU ARM9 64K SRAM 144LFBGA

AT91SAM9R64-CU-999

Manufacturer Part Number
AT91SAM9R64-CU-999
Description
IC MCU ARM9 64K SRAM 144LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9R64-CU-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, UART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9R64-CU-999
Manufacturer:
Atmel
Quantity:
10 000
39.11.8
Name: DMACON
Access: Read/Write
Reset value: 0x00000000
• DMAEN: DMA Enable
0: DMA is disabled.
1: DMA is enabled.
• DMARST: DMA Reset (Write-only)
0: No effect.
1: Reset DMA module. DMA Module should be reset only when disabled and in idle state.
• DMABUSY: DMA Busy
0: DMA module is idle.
1: DMA module is busy (doing a transaction on the AHB bus).
• DMAUPDT: DMA Configuration Update
0: No effect
1: Update DMA Configuration
addressing. The values written in the registers DMABADDR1, DMABADDR2 and DMA2DCFG, and in the field FRMSIZE of
register DMAFRMCFG, are accepted by the DMA controller and are applied at the next frame. This bit is used only if a dual
scan configuration is selected (bit SCANMOD of LCDCON2 register) or 2D addressing is enabled (bit DMA2DEN in this
register). Otherwise, the LCD controller accepts immediately the values written in the registers referred to above.
• DMA2DEN: DMA 2D Addressing Enable
0: 2D addressing is disabled (values in register DMA2DCFG are “don’t care”).
1: 2D addressing is enabled.
6289C–ATARM–28-May-09
31
23
15
7
DMA Control Register
30
22
14
6
.
Used for simultaneous updating of DMA parameters in dual scan mode or when using 2D
29
21
13
5
DMA2DEN
28
20
12
4
AT91SAM9R64/RL64 Preliminary
DMAUPDT
27
19
11
3
DMABUSY
26
18
10
2
DMARST
25
17
9
1
DMAEN
24
16
8
0
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