AT91SAM9R64-CU-999 Atmel, AT91SAM9R64-CU-999 Datasheet - Page 864

IC MCU ARM9 64K SRAM 144LFBGA

AT91SAM9R64-CU-999

Manufacturer Part Number
AT91SAM9R64-CU-999
Description
IC MCU ARM9 64K SRAM 144LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9R64-CU-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, UART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9RL-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9R64-CU-999
Manufacturer:
Atmel
Quantity:
10 000
Figure 44-3. SMC Timings - NRD Controlled Read and NWE Controlled Write
44.8.6
864
A0/A1/NBS[3:0]/A2-A25
D0 - D31
AT91SAM9R64/RL64 Preliminary
SDRAMC
NWE
NRD
NCS
SMC6
SMC5
Timings are given assuming a capacitance load on data, control and address pads:
Table 44-30. Capacitance Load on Data, Control and Address Pads
Table 44-31. Capacitance Load on SDCK Pad
The SDRAM Controller satisfies the timings of standard PC100, PC133 (3.3V supply) and
Mobile SDRAM (1.8V supply) which are given in
Table 44-32. SDRAM PC100 Characteristics
NRD Controlled READ
IO Supply
3.3V
1.8V
IO Supply
3.3V
1.8V
Parameter
SDRAM Controller Clock Frequency
Control/Address/Data In Setup
Control/Address/Data In Hold
Data Out Access time after SDCK rising
Data Out change time after SDCK rising
with NO HOLD
SMC7
SMC1
SMC2
MAX
50 pF
30 pF
MAX
10 pF
10 pF
SMC17
SMC18
NWE Controlled WRITE
with NO HOLD
SMC16
Corner
Corner
SMC15
(1)(2)
(1)(2)
SMC21
SMC21
STH
50 pF
30 pF
STH
10 pF
10 pF
SMC21
SMC6
SMC5
NRD Controlled READ
SMC7
with HOLD
SMC3
3.3V Supply
Table
SMC4
Min
2
1
3
44-32,
Table 44-33
SMC17
SMC18
NWE Controlled WRITE
3.3V Supply
with HOLD
SMC16
Max
100
6
SMC15
and
6289C–ATARM–28-May-09
Table
SMC19
SMC20
SMC19
44-34.
Units
MHz
ns
ns
ns
ns

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