ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 53

• Manufacturer Part Number: ST10F280
• Description: MCU 16BIT 512K FLASH MAC 208-PBG
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F280

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, SSC
• Peripherals: POR, PWM, WDT
• Number Of I /o: 143
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 32x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-PBGA
• Processor Series: ST10F28x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.4 - Exception and Error Traps List
Table 8 shows all of the possible exceptions or error conditions that can arise during run-time :
Table 8 : Exceptions or Error Conditions that Can Arise During Run-time
*
Reset Functions
Hardware Reset
Software Reset
Watchdog Timer Overflow
Class A Hardware Traps
Non-Maskable Interrupt
Stack Overflow
Stack Underflow
Class B Hardware Traps
Undefined Opcode
Protected Instruction Fault
Illegal Word Operand Access
Illegal Instruction Access
Illegal External Bus Access
MAC Trap
Reserved
Software Traps
TRAP Instruction
- All the class B traps have the same trap number (and vector) and the same lower priority compare to the class A traps and to the resets.
- Each class A traps has a dedicated trap number (and vector). They are prioritized in the second priority level.
- The resets have the highest priority level and the same trap number.
- The PSW.ILVL CPU priority is forced to the highest level (15) when these exeptions are serviced.
Exception Condition
Trap Flag
UNDOPC
MACTRP
PRTFLT
ILLBUS
ILLOPA
STKOF
STKUF
ILLINA
NMI
STUTRAP
STOTRAP
NMITRAP
BTRAP
RESET
RESET
RESET
BTRAP
BTRAP
BTRAP
BTRAP
BTRAP
Vector
Trap
Any [00’0000h– 00’01FCh]
Vector Location
in steps of 4h
[2Ch –3Ch]
00’0000h
00’0000h
00’0000h
00’0008h
00’0010h
00’0018h
00’0028h
00’0028h
00’0028h
00’0028h
00’0028h
00’0028h
Any [00h – 7Fh]
Trap Number
[0Bh – 0Fh]
0Ah
0Ah
0Ah
0Ah
0Ah
0Ah
00h
00h
00h
02h
04h
06h
ST10F280
CPU Priority
MAXIMUM
MINIMUM
Priority
Current
Trap *
III
III
III
II
II
II
I
I
I
I
I
I
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