D12312SVTEBL25 Renesas Electronics America, D12312SVTEBL25 Datasheet - Page 384
![IC H8S MCU ROMLESS 100-QFP](/photos/28/61/286108/100-tqfp_sml.jpg)
D12312SVTEBL25
Manufacturer Part Number
D12312SVTEBL25
Description
IC H8S MCU ROMLESS 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12312SVTEBL25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTEBL25
HD6412312SVTEBL25
HD6412312SVTEBL25
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Section 9 16-Bit Timer Pulse Unit (TPU)
Example of Synchronous Operation: Figure 9.15 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGR0B compare match has been set as the channel 0 counter clearing source, and synchronous
clearing has been set for the channel 1 and 2 counter clearing sources.
Three-phase PWM waveforms are output from pins TIOC0A, TIOC1A, and TIOC2A. At this
time, synchronous presetting, and synchronous clearing by TGR0B compare match, is performed
for channel 0 to 2 TCNT counters, and the data set in TGR0B is used as the PWM cycle.
For details of PWM modes, see section 9.4.6, PWM Modes.
Rev.7.00 Feb. 14, 2007 page 350 of 1108
REJ09B0089-0700
TGR0B
TGR1B
TGR0A
TGR2B
TGR1A
TGR2A
H'0000
TIOC0A
TIOC1A
TIOC2A
TCNT0 to TCNT2 values
Figure 9.15 Example of Synchronous Operation
Synchronous clearing by TGR0B compare match
Time
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