D12312SVTEBL25 Renesas Electronics America, D12312SVTEBL25 Datasheet - Page 778
D12312SVTEBL25
Manufacturer Part Number
D12312SVTEBL25
Description
IC H8S MCU ROMLESS 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12312SVTEBL25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTEBL25
HD6412312SVTEBL25
HD6412312SVTEBL25
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Section 17 ROM
17.27
It is possible to alternate between the user MAT and user boot MAT. However, the following
procedure is required because these MATs are allocated to address 0.
(Switching to the user boot MAT disables programming and erasing. Programming of the user
boot MAT should take place in boot mode or PROM mode.)
(1) MAT switching by the FMATS register should always be executed from the on-chip RAM.
(2) To ensure that the MAT that has been switched to is accessible, execute 4 NOP instructions in
(3) If an interrupt has occurred during switching, there is no guarantee of which memory MAT is
(4) After the MATs have been switched, take care because the interrupt vector table will also have
• Prepare the same interrupt processing routines and interrupt vectors in both the user MAT and
• Transfer the interrupt processing routines to on-chip RAM beforehand and set the interrupt
(5) Memory sizes of the user MAT and user boot MAT are different. When accessing the user
Rev.7.00 Feb. 14, 2007 page 744 of 1108
REJ09B0089-0700
the on-chip RAM immediately before or after writing to the FMATS register of the on-chip
RAM (this prevents access to the flash memory during MAT switching).
being accessed. Always mask the maskable interrupts before switching between MATs. In
addition, configure the system so that NMI interrupts do not occur during MAT switching.
been switched. Methods for processing the same interrupt before and after MAT switching
include the following:
user boot MAT.
vectors to the same on-chip RAM addresses for both the user MAT and user boot MAT.
boot MAT, do not access addresses above the top of its 8-kbyte memory space. If access goes
beyond the 8-kbyte space, the values read are undefined.
Switching between User MAT and User Boot MAT
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