D12312SVTEBL25 Renesas Electronics America, D12312SVTEBL25 Datasheet - Page 537
D12312SVTEBL25
Manufacturer Part Number
D12312SVTEBL25
Description
IC H8S MCU ROMLESS 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12312SVTEBL25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412312SVTEBL25
HD6412312SVTEBL25
HD6412312SVTEBL25
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13.2
Registers added with the smart card interface and bits for which the function changes are
described here.
13.2.1
SCMR is an 8-bit readable/writable register that selects the smart card interface function.
SCMR is initialized to H'F2 by a reset and in hardware standby mode. In software standby mode
and module stop mode it retains its previous state.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion
format.
Bit 3
SDIR
0
1
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This
function is used together with the SDIR bit for communication with an inverse convention card.
The SINV bit does not affect the logic level of the parity bit. For parity-related setting procedures,
see section 13.3.4, Register Settings.
Bit
Initial value :
R/W
Register Descriptions
Smart Card Mode Register (SCMR)
Description
TDR contents are transmitted LSB-first
Receive data is stored in RDR LSB-first
TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
:
:
—
—
7
1
—
—
6
1
—
—
5
1
—
—
4
1
Rev.7.00 Feb. 14, 2007 page 503 of 1108
SDIR
R/W
3
0
Section 13 Smart Card Interface
SINV
R/W
2
0
REJ09B0089-0700
—
—
1
1
(Initial value)
SMIF
R/W
0
0
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