R5F21217JFP#U1 Renesas Electronics America, R5F21217JFP#U1 Datasheet - Page 90

MCU FLASH 48K 2.5K CMOS 48LQFP

R5F21217JFP#U1

Manufacturer Part Number
R5F21217JFP#U1
Description
MCU FLASH 48K 2.5K CMOS 48LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/21r
Datasheet

Specifications of R5F21217JFP#U1

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
10.2
10.2.1
10.2.2
This clock is supplied by an on-chip oscillator. The on-chip oscillator contains a high-speed on-chip oscillator and
a low-speed on-chip oscillator. Either an on-chip oscillator clock is selected by the FRA01 bit in the FRA0 register.
The clock generated by the low-speed on-chip oscillator is used as the clock source for the CPU clock,
peripheral function clock, fOCO, and fOCO-S.
After reset, the on-chip oscillator clock generated by the low-speed on-chip oscillator by divide-by-8 is
selected for the CPU clock.
If the XIN clock stops oscillating when the OCD1 to OCD0 bits in the OCD register are set to 11b, the low-
speed on-chip oscillator automatically starts operating, supplying the necessary clock for the MCU.
The frequency of the low-speed on-chip oscillator varies depending on the supply voltage and the operating
ambient temperature. The application products must be designed with sufficient margin to accommodate the
frequency range.
The clock generated by the high-speed on-chip oscillator is used as the clock source for the CPU clock,
peripheral function clock, fOCO, fOCO-F and fOCO40M.
To use the high-speed on-chip oscillator clock as the clock source of the CPU clock, peripheral clock, fOCO,
and fOCO-F, set bits FRA20 to FRA22 in the FRA2 register as follows;
All divide ratio mode settings are supported when VCC = 3.0 V to 5.5 V (J version)000b to 111b
Divide ratio of 4 or more when VCC = 2.7 V to 5.5 V and K version
After reset, the on-chip oscillator clock generated by the high-speed on-chip oscillator stops. The oscillation
starts by setting the FRA00 bit in the FRA0 register to 1 (high-speed on-chip oscillator on). The frequency can
be adjusted by the FRA1 and FRA2 registers.
Since there are differences in the amount of frequency adjustment among the bits in the FRA1 register, make
adjustments by changing the settings of individual bits.
Adjust the amount of high-speed on-chip oscillator frequency to 40 MHz and below by setting the FRA1
register.
On-Chip Oscillator Clocks
Low-Speed On-Chip Oscillator Clock
High-Speed On-Chip Oscillator Clock
Page 72 of 458
10. Clock Generation Circuit
010b to 111b

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