HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 215
HD6413003TF16V
Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13003TF16V.pdf
(717 pages)
Specifications of HD6413003TF16V
Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Company:
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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Bits 2 to 0—Data Transfer Select (DTS2B, DTS1B, DTS0B): These bits select the data transfer
activation source. The selectable activation sources differ between normal mode and block transfer
mode.
Normal mode
Bit 2
DTS2B
0
1
Note: Settings marked with asterisks (*) cannot be used.
Block transfer mode
Bit 2
DTS2B DTS1B DTS0B Description
0
1
Note: Settings marked with asterisks (*) cannot be used.
The same internal interrupt can be selected to activate two or more channels. The channels are
activated in a priority order, highest priority first. For the priority order, see section 8.4.9,
Multiple-Channel Operation.
Bit 1
0
1
0
1
Bit 1
DTS1B
0
1
0
1
Bit 0
0
1
0
1
0
1
0
1
Bit 0
DTS0B
0
1
0
1
0
1
0
1
Compare match/input capture A interrupt from ITU channel 0 (Initial value)
Compare match/input capture A interrupt from ITU channel 1
Compare match/input capture A interrupt from ITU channel 2
Compare match/input capture A interrupt from ITU channel 3
*
*
Falling edge of DREQ
*
Description
Auto-request (burst mode)
*
Auto-request (cycle-steal mode)
*
*
*
Falling edge of DREQ
Low level input at DREQ
195
(Initial value)
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