HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 561
HD6413003TF16V
Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13003TF16V.pdf
(717 pages)
Specifications of HD6413003TF16V
Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Company:
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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18.3.2 Refresh Controller Bus Timing
Refresh controller bus timing is shown as follows:
•
•
Note: * Stipulation from earliest CS3 and RD negate timing.
ø
A
AS
CS3 (RAS)
RD (CAS)
HWR (UW),
LWR (LW),
(read)
HWR (UW),
LWR (LW),
(write)
RFSH
D
(read)
D
(write)
9
15
15
DRAM bus timing
Figures 18-7 to 18-12 show the DRAM bus timing in each operating mode.
PSRAM bus timing
Figures 18-13 and 18-14 show the pseudo-static RAM bus timing in each operating mode.
to A
to D
to D
1
0
0
Figure 18-7 DRAM Bus Timing (Read/Write): Three-State Access
t
t
AD
RAD1
t
AS1
T
1
t
RAH
t
ASD
t
t
AD
WDS3
—
t
RAC
2WE Mode —
t
AS1
T
2
t
t
AA
ASD
541
t
CAC
t
t
RDS
CAS
T
3
t
RAD3
t
t
SD
SD
t
WDH
t
t
RDH*
t
CRP
RP
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