HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 87
HD6413003TF16V
Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13003TF16V.pdf
(717 pages)
Specifications of HD6413003TF16V
Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Company:
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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4.2 Reset
4.2.1 Overview
A reset is the highest-priority exception. When the
H8/3003 enters the reset state. A reset initializes the internal state of the CPU and the registers of
the on-chip supporting modules. Reset exception handling begins when the RES pin changes from
low to high.
The H8/3003 can also be reset by overflow of the watchdog timer. For details see section 12,
Watchdog Timer.
4.2.2 Reset Sequence
The H8/3003 enters the reset state when the RES pin goes low.
To ensure that the H8/3003 is reset, hold the RES pin low for at least 20 ms at power-up. To reset
the H8/3003 during operation, hold the RES pin low for at least 10 system clock (ø) cycles. See
appendix D.2, Pin States at Reset, for the states of the pins in the reset state.
When the RES pin goes high after being held low for the necessary time, the H8/3003 starts reset
exception handling as follows.
•
•
Figure 4-2 shows the reset sequence in modes 1 and 3. Figure 4-3 shows the reset sequence in
modes 2 and 4.
The internal state of the CPU and the registers of the on-chip supporting modules are
initialized, and the I bit is set to 1 in CCR.
The contents of the reset vector address (H'0000 to H'0003) are read, and program execution
starts from the address indicated in the vector address.
67
RES pin goes low, all processing halts and the
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