HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 92
HD6413003TF16V
Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13003TF16V.pdf
(717 pages)
Specifications of HD6413003TF16V
Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Company:
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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4.6 Notes on Stack Usage
When accessing word data or longword data, the H8/3003 regards the lowest address bit as 0. The
stack should always be accessed by word access or longword access, and the value of the stack
pointer (SP, ER7) should always be kept even. Use the following instructions to save registers:
Use the following instructions to restore registers:
Setting SP to an odd value may lead to a malfunction. Figure 4-6 shows an example of what
happens when the SP value is odd.
SP
Legend
CCR:
PC:
R1L:
SP:
Note: The diagram illustrates modes 3 and 4.
PUSH.W Rn (or MOV.W Rn, @–SP)
PUSH.L ERn (or MOV.L ERn, @–SP)
POP.W Rn
POP.L ERn
Condition code register
Program counter
General register R1L
Stack pointer
SP set to H'FFFEFF
TRAPA instruction executed
(or MOV.W @SP+, Rn)
(or MOV.L @SP+, ERn)
Figure 4-6 Operation when SP Value is Odd
SP
Data saved above SP
CCR
PC
72
MOV. B RIL, @-ER7
SP
CCR contents lost
RIL
PC
H'FFFEFA
H'FFFEFB
H'FFFEFC
H'FFFEFD
H'FFFEFF
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